Tristate bus on spartan FPGA

Hi, im implementing a 16bit bus along the lines of AMBA APB for some of my peripherals like IDE ATA controller, LCD dsplay controller, ftdi usb interface etc. But i found that xilinx spartan devices have no internal tristate buffers. I have a dozen or more peripherals to connect. Any idea of how i can implement this?

thanks, aravind

Reply to
aravind
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Use multiplexers. Internal tristate buses are deprecated in ASIC designs and - most wisely, IMHO - not possible in FPGA designs.

Reply to
RCIngham

Possible - Yes. But big and slow therefore depreciated. You can code tristate buses and most tolls will emulate them with multiplexers.

Regards, Maki

Reply to
Maki

Maki,

If you are thinking CODE REUSE, write using MUX !

The new devices from Xilinx and other vendors do not include the long Tri-state lines -> So write using MUX !

Laurent www.am> RC>

Reply to
Amontec, Larry

As the others have said, use muxes on chip. Also, doesn't AMBA APB uses muxes anyway?

Cheers, Jon

Reply to
Jon Beniston

APB uses uni-directional read and write databusses.

Mike

Reply to
Mike Lewis

I would expect the same utilization for either description. The question is which description is easier for the designer to write and test. That of course, depends on the designer.

-- Mike Treseler

Reply to
Mike Treseler

I thought the tools would synthesize the appropriate MUX given tristate buffer logic. They probably do that better than explicitly programmed MUX logic.

-- glen

Reply to
glen herrmannsfeldt

(I wrote)

Someone from Xilinx posted a method that uses the FF's in the FPGA to do this. I presume that only works if the output is registered, but it does seem to be an interesting solution. I doubt it will generate that from explicit MUX logic, though.

Also, the cases with more than one selected at the same time should be "don't care" states, which MUX logic might not take into consideration.

-- glen

Reply to
glen herrmannsfeldt

True, AMBA 2.0 suggests we could use separate read and write data buses. There shouldn't be a problem for write data bus. but for Read , multiple peripherals will be driving the PRDATA signals of AMBA APB controller. Anyway multiplexing seems to be the only way to implement it. Just wondering, What approach do ASICs, Processors etc use these days when a tristate bus is ruled out?

Reply to
aravind

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