I just managed to crawl back up out of the rabbit hole I fell down concerning the SMPS design.
I've been reading Pressman's book on the subject. And dealing with the data sheets of related PWMs.
I had to read Pressman's chapter on stabilizing feedback loops about five times before I began to understand it.
So following the tennents of the chapter, I drew out the transfer function for the error amplifier. I'm simulating an UC3842 style device in a double ended flyback converter at the moment.
So for 100Khz switching frequency I chose 20kHz for the cress-over frequency, 2kHz for the zero, and 200kHz for the pole.
A plastic cap was employed for the filter cap so the esr zero was our around 10MHz or so. Accordingly I decided to make the gain curve of the error amplifier have a slope of zero between the zero and the pole in order to give the over all gain a slope of -1 as it passed through Fco.
At this point I felt rather pleased with my self for apparently being so smart, and moved on to simulate my newly worked out feed back loop.
Well, it worked. Worked terribly that is. :|
After an unsatisfying call to the chip manufactor. I put myself to ponder why the data sheet compensation network looked different from what was detailed in Pressman's book for a type 2 error amplifier.
Seeing that in the data sheet just a parallel RC was connected between the EA input and output pins, I tried that with various vales till I found some that worked well. This is without the input resistor as shown in the book.
So, I got the thing apparently working well, although I am clueless to why. I have come to the conclusion that the resistor divider for the feedback loop is the input resistor and it value is the Thevenin equivalent for that.
In one of the PWM data sheets I read it briefly mentioned that the Thevenin equivalent for the divider for that particular device should be around 3k to provide that best current cancellation, although omitted and further elaboration about that.
So I have a couple of questions. Why does the zero made seemingly so important in Pressman's book cause a bit of wobble in the error correction action. It less than sustained oscillation, but it does cause a few rebounds before settling down after a transient with the zero present.
With just the pole at 200kHz the error amp works great. Is there some reference that covers this in detail like Pressman's book?
I suppose I could try to derive how to calculate the phase margin of just the parallel RC error amp network with or without the Thevenin equivalent for the input impedance, although it sure would be convenient if someone has already explained how to do so properly.
And by the way what is a type 1 error amplifier?
Also If anyone could send me a copy of the Venable paper from the eighties referred to practically everywhere I would appreciate it. I've scoured the web in vain looking for one.
Fred