Flag desecration?

I used it (along with a transistor and a few other parts) for a WDT/BOR ca. 1990-1992.

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

On Thu, 13 Jul 2006 10:17:29 -0500, John Fields Gave us:

She told me I was aiming too low... but I didn't listen.

No, it was the VIC-20. The C64 used the dual 556. One half for reset, and the other to generate a narrow pulse when you pressed a certain key.

--
Service to my country? Been there, Done that, and I\'ve got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

--
Some would disagree.

Well, unlike some, I'd rather postpone that particular experiment, thank you very much. After all, how much freedom does a corpse in a box, or a jug of ashes, have?

Or are you saying your imaginary part is more real than your real part?

Thanks, Rich

--
No, Voh(min) is 3.3V for 74XX TTL

This is another of your Texan "facts". Check out

where Voh is listed as 2.4V(min), 3.4V (typ) while Voh(max) is unspecified (but it has to be less than 5.25V).

True, but worst case tolerancing is all about setting the upper and lower limits as quickly as possible. If we set Voh(max) = 3.8V

k2 = ln 3.4/(3.4-0.4) = 0.125

Using Voh(max) = 3.8V this becomes 1.2/0.125 = 9.59

which is still close enough to my 10:1 for all practical purposes.

It isn't what we used, but it should serve.

Sadly, the web-site is not based on datasheet values. Going back to the

7400 data sheet above

Vcc = 5V +/-0.25V Voh = 2.4V(min), 3.4V(typ), 3.8V (max - not a data sheet value, but reasonably credible) Vih = 2.0V Vil = 0.8V Vol = 0.4V

Voh = 2.4V Vih = 2.0V and Vol= 0.0V

Two diode drops? Call it 5V-1.2V for 3.8V.

Voh = 3.8V Vilh=0.8V and Vol =0.4V

k = ln 2.4/2.0 = 0.182

k = ln 3.4/(0.8-0.4) = 2.14

A spread of 11.7.

My worst cases do take that into account, - when you do construct a worst case, you have to choose the right combination of high and low thresholds and output voltages to to push the pulse width to its extreme value, and I don't think you've done that every time.

Despite that , the main problem with your analysis is that you chose incorrect thresholds because you didn't go back to the manufacturer's web site. *I* can still remember the TTL thresholds, though I haven't used any TTL for about ten years now ....

--
Bill Sloman, Nijmegen

--
Nope, I got the data from:

 http://www.interfacebus.com/voltage_threshold.html

You did mention the web-site. The Texan aspect of the information it provides is that it is both wrong and convneient to your argument.

I considered it accurate, since what it said it agreed with what I remembered about TTL thresholds, and the numbers in Horowitz and Hill's "The Art of Eectronics". Texas Instruments did their usual diabolically sloppy job in specifying the parts, but IIRR they were the first to sell the 54/74 series TTL logic. Subsequent variants did have better specs.

You can specify what you like, but what we need to know is how high a worst case output could go. Your choice of 0.7V for a diode drop rather over-simplifies the situation.

The BC184 transistor is one of the few with an explicit specification of the base-emitter voltage, see

which gives 0.55V to 0.7V at 2mA, and of course it does depend on current.

Tolerancing isn't - per se - about accuracy. It is about designing a circuit so that it will work under all foreseeable circumstances. It the worst case analysis finds a situation where the circuit might not work, then - and only then - is it worth the trouble to perform a more detailed and precise analysis.

Where did you get 0.125 from? An in any event, your 0.133 is simply wrong - you've used the relationship without understanding what you are doing, and have plugged in quite the wrong numbers.

You are starting with a capacitor C charged up to 3.8V (Vorigin), and you are discharging it through a resistor R to an output at 0.4V (Vend)

dV/dt= I/C

I=(V-0.4)/R

so dV/dt=(V-0.4)/RC

Integrating

V - 0.4= (V(origin) -0.4). e^(-t/RC)

Solving to get a t that will give V=0.8V

(0.8 - 0.4)/(3.8 - 0.4) = e^(-t[08]/RC)

or 0.1176 =e^(-t[0.8]/RC)

taking the natural logarithms of both sides

2.14 = t[0.8]/RC

or, putting ti another way, it takes 2.14 time constants for the voltage on the capacitor to decay from 3.8 to 0.8V on the way to 0.4V.

Your 0.133 is simply the results of getting the equation wrong. My "0.125 " (which I can't in any of the my relevant postings in this thread) was for the other extreme situation, where the capacitor had only charged up to 2.4V and was discharging to an output voltage of 0V

- unrealsistic, but easy to pick - when the logic threshold was at 2.0V

ln 2.4/2.0 = 0.182

Taking these two worst cases 2.14/0.182 = 11.7

Letting the capacitor decay towards 0.1V rather than 0V gives us

ln 2.3/1.9 = 0.191 and the ratio shifts down to 11.2

Since I do understand the equations, I can tell you that fiddling with the high and low output voltages doesn't make any significant difference to the proposition that building monstables with TTL gates is a mug's game, and I'm certainly not interested in spending any more time educating you in this relatively trivial aspect of circuit analysis, which is another mug's game.

--
Bill Sloman, Nijmegen

On 16 Jul 2006 16:29:33 -0700, snipped-for-privacy@ieee.org Gave us:

In other words, you lose. You are just now realizing it. It isn't about TTL. It is about you backing out of a declaration which you made.

Not just a Phat Bytestard, but also a Phulish Bytestard. Find this declaration that I'm "backing out of", cite it, and I'm fairly confident that I'll be able to demonstrate that you need Remedial Reading 101.

Checkiing out your contributions to this user group, the only one that showed any trace of sense was your long disquisition on how to tighten up the clamping nuts on closely spaced SMA connectors. I haven't got high hopes that Remedial Reading 101 would help much - it might make more sense to go straight to the brain implant.

--
Bill Sloman, Nijmegen

--
Since you don\'t seem to be able to comprehend the difference between
charging and discharging and are totally incapable of understanding
the graphics I presented to help you along, I do agree that spending
any more time allowing you to play your games would be fruitless.

So, until next time, I\'ll be off making a living designing in
one-shots as I see fit while you\'ll be...???

Shit. I blew it.

Okay. So that worst case is 0.133 time constants. Actually

ln(3.6 -0.4)/(3.6 -0.8)= 0.13353

My (defensible) assumption of a slightly higher worst case output voltage of 3.8V gives

ln (3.8-04)/3.8-0.8) = 0.125

The other extreme on charging up is charging up from 0V - okay for you

0.1V - towards 2.4V, with the threshold at 2.0V, which takes 1.75 time constants.

but 1.75/0.133 = 13.15

and there is still more than 10:1 tolerance on the delay for a given RC product.

Designing monstables around TTL gates is still a mugs game.

--
Bill Sloman, Nijmegen

schreef in bericht news: snipped-for-privacy@b28g2000cwb.googlegroups.com...

Should that not be ~10% or 10:11 or something.

--
Thanks, Frank.
(remove 'q' and '.invalid' when replying by email)

--
Welcome to the Human race :-)

No. Try and make a monostable with a simple TTL gate and the delay you actually get can vary from something like twice the RC product to less than 20% of the RC product.

There are situations where this is acceptable, but you end up having to be sure that you can cope with a delay more than ten times longer than you need in order to be sure of generating the minimum delay you can get away with.

--
Bill Sloman, Nijmegen

No. Which is why I prefer to assume the worst possilbe case - of zero voltage drop across both diodes, unrealistic as it is. Vbe is proportional to the log of the current density in the diode divided by the "off" leakage current which we don't really know.

In the event it doesn't make much difference.

I've had it roughly right all along - 10:1 was my original claim and worst than 10:1 iss what we come out with.

Agreed. You can buy 1% polypropylene film capacitors and 0.1% resistors, but you wouldn't bother in this sort of application.

Rheostats aka potentiometers are devices which are adjusted by service engineers and graduate students until the circuit stops working, so they can get to meet a real engineer and learn things about their ancestry that their mother never told them.

You've got LTSpice; why not use it to make decent graphics?

--
Bill Sloman, Nijmegen

--- In error.

A rheostat is a two-terminal device, while a potentiometer is a three-terminal device.

Both are variable resistors and a potentiometer can be _used_ as a rheostat, but that doesn't make it one.

---

-- Why bother?

What I posted was good enough. Was it illegible?

-- John Fields Professional Circuit Designer

Where would that be? Between your ears? A Rheostat has two terminals, a Potentiometer has three.. How do you set a "Potential" on a two terminal device that can only be adjusted from 0 Ohms, to its maximum value. Its a whole nother animal, Willie.

--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida