Debouncing....at About 1Mhz

Nov 01, 2007 300 Replies

If it's for your own enlightenment, design from scratch. That way, if you succeed, the thrill of discovery will be yours as much as it was for whoever came up with it first, if you weren't. And, if you fail, you will have, at least, fought the good fight. :-)

There's nothing quite so satisfying as building something yourself and having it work... almost as good as an orgasm ;-)

...Jim Thompson

| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | America: Land of the Free, Because of the Brave

lol... When I first posted this problem (Debouncing....at About 1Mhz). I did suspect it was a classic problem with a known classic solution. I just didn't think of in what... Oscilloscopes! Doh! :(

About all schematics...

The thing I don't like about the use of comparator solutions is a bucketload of resistors are needed as seen in my design and JF's design.

The JL based 2 D ff + one shot I posted has a lower parts count and the same goes for your (Jim) recently posted schematics. All with only 1 Dff prop delay off the primary pos edge and primary neg edge.

It looks like it's down to D flip flops vs comparators.

I like the parts count of Dff based designs and I'm going to look at'm closer..

D from BC

Jim Thompson snipped-for-privacy@My-Web-Site.com posted to sci.electronics.design:

Damnit, are you trying to make feel old. Today is catching.

[snip]

Sno-o-o-ort!

...Jim Thompson

| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | America: Land of the Free, Because of the Brave

ChairmanOfTheBored snipped-for-privacy@crackasmile.org posted to sci.electronics.design:

Goodness, 4 paragraphs and not a curse word in it. You even seem to make sense this time. If you post like this you could be welcome here.

D from BC snipped-for-privacy@comic.com posted to sci.electronics.design:

I would say the idea is on target the the implementation is excessively partsy. Simplify.

[snip]

Amazing! Indeed such commentary is very welcome here.

...Jim Thompson

| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | America: Land of the Free, Because of the Brave

Must be what happened to you.

D from BC snipped-for-privacy@comic.com posted to sci.electronics.design:

Yeah, but my pen (when using the tablet) can move a symbol or even a group of symbols.

These have internal hysteresis but, after just a cursory glance, I haven\'t figured out how to make that work in this application.

Thanks for the complement..

I hurt my brain thinking up that circuit.. :) That's why I have 'op amp' and 'comparator' all mixed up :P

I don't know if I could have thought of this circuit without seeing JL's RC+schmitt circuit.

You asked how long it takes to get through... (You mean the tp performance..)

On

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The desired output edge forms after only 1 comparator delay.

Not only is the edge formed by crossing a threshold but also reinforced by regenerative feedback that also starts after 1 comparator delay too.

It probably has the same tp performance as your circuit when using same comparators.

The difference might be with input overdrive.

I recall seeing input overdrive specs on comparator datasheets. The more overdrive...the less tp. With positive feedback...there's overdrive :) So I suspect the positive feedback will push the comparator to react quicker.

D from BC

Better, sometimes, since you don't have to deal with the politics...

My first post, the quad xor + dff + rc, still looks like the simplest and fastest circuit so far. It appears to be hazard free, too, at least using cmos transmission-gate flipflops.

The last one I posted, 1 xor and 1 dflop and 1 rc, is sort of a hybrid of my circuit and Jim's. It's not bad either. Too bad the really fast tiny-logic flops don't generally have qbar.

John

There are some around her who haven't experienced either. You can tell, because they are always on edge.

Service to my country? Been there, Done that, and I've got my DD214 to prove it. Member of DAV #85. Michael A. Terrell Central Florida

This one looks OK to me. The rc keeps D from changing anywhere near clock edges. The reason the clock goes back low is because qbar has already flipped, and you can't take that back.

This makes a short (2 pd) positive clock blip every input transition, or a whole mess of them when the input chatters. All of them clock the "old" rc filtered level into the flop. It's close to my original circuit, but uses your xor thing to eliminate the three dummy delay stages.

This is close to minimal from a parts count standpoint. 4 parts approaches 0 parts as design time approaches infinity.

John

There won't be any razor thin spikes.. I believe your circuit will work just fine.

The bug I have with comparator solutions is the bucketload of resistors needed. I hate smd layout :)

So Jim's Dff designs look good.

D from BC

As if a total dolt like you could tell anything of the sort.

I might put it back in the oven for more cooking but I dunno yet...I might switch meals :)

D from BC

Doesn't there have to be more than one person for politics to exist?

Best regards, Spehro Pefhany

"it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com

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