Debouncing....at About 1Mhz

Yeah, I was thinking along those lines. This is a "feed-beside" sort of concept, a brutally fast forward path, with slower tweaks off to the side to fix the low-speed defects. This was the concept Tek used in their 7000 series oscilloscopes.

I was also thinking that the origical hysteresis idea was OK except that the hyst band of cmos schmitts is poorly defined. That's fixable by defining it better, namely by adding additional hysteresis. The numbers ought to work.

John

With PREbar functional....

I use that inverter/buffer characteristic of the XOR a lot...

Say I have an 8GHz (Johnson-type) divider chain down to 125MHz... object to create single-side-band. (Mixed-mode to boot... CML down to around 500MHZ, then CMOS.)

Since it's a Johnson counter with no set or reset, how do I guarantee the phase relationship of the 8GHz to the 125MHz?

Answer, I don't.

What I did was measure literally, using a cell aptly named "WhosOnFirst.sch" (*) and invert as needed.

(*) No one got the joke. Youngsters :-(

...Jim Thompson

I've been known to toss designs that I had been working for weeks/months, because of too many "patches".

Panics the hell out of clients until they see the results of a clean start.

...Jim Thompson

It takes guts to dump something you've put three months into. Even if the new thing would be better and finished sooner. It's even more difficult in a team design, where peer pressure exists. But yeah, I'll consider dumping a design that's far along, even finished, when a better or simpler idea pops up, or when the original starts creaking of its own weight.

That's why it's better to not start too soon, to play with ideas for a while at the start.

John

I've done that in Manchester-coded optical systems. If the uP doesn't see good data frames for a while, it sets a bit to xor the data stream, and sets another bit to open up the pll filter bandwidth.

John

My wife says I have the Michelangelo syndrome, with the Pope (aka the client) saying, "When will you make an end?"

I'm always striving for that simple perfect work of art ;-)

...Jim Thompson

You don't drag them, you push them around! ;-)

At the peak of the Beatles era, I designed the "Come Together" circuit for levelling the steam pressures from two boilers that had separate control loops.

Did you like my Seesaw Inverter?

John

On Sun, 11 Nov 2007 07:56:21 -0800, John Larkin wrote:

--- I think this pretty much takes care of it all.

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-- JF

I still sketch for the tough problems. That gives me the freedom to express the problem in any fashion. If drawing cartoons of a little choo choo train stuck in a valley helps to solve the circuit ... great! :)

Also, I think I can move my pen faster than a mouse. D from BC

Coffee works better for me.

OK, how about this?

John

Yup ..this is in the same solution family.

Without running a sim, I can see how this works.. It's comparator reference level shifting by differentiator. The differentiator pops the - input into oblivion for a time which makes the comparator dead and that's how the fuzzy edges are skipped. Nice.... Uses single output op amps. Single device prop delay.

I like my 80% baked solution on

The first op amp is unstable. When an edge crosses the threshold the comparator locks up fast due to a local positive feedback loop. The input signal probably can't compete with this and therefore no race condition exists and it's unlikely the timing will fault. (Yes...I got scared by JL posts of asynch hairballs. :) )

JF, I see a 2 comparator delay in disabling the first comparator. I have to wonder if some glitch could still slip through..

In my circuit the first comparator is disabled by 1 comparator delay.

D from BC

Looks pretty good. The only hazard I can see is that a very fast spike can blow through the first comparator before the second one has time to come back around. That's a hazard with most all comparators that have external hysteresis.

That's only a problem if the input can in fact have such fast spikes, which in this case maybe it can't.

John

Damn...that's right...This is freakn scope trigger tech... :P I didn't notice. Bummer... :( I'm reinventing the wheel again.

Now I'm wondering if I could have cheated and looked up oscilloscope trigger circuit patents to dodge a whole lot of dinking with gates, D ff's and one shots. There should be ooodles of trigger art since the invention of the oscilloscope.

What to do..... Use time sifting through mountains of patents versus use time designing from scratch..

D from BC

I found, at least with 74HC' stuff, that I needed to delay the clock flip-over as well... looked like SUAH timing was violated.

...Jim Thompson

Well, DUH! My circuit trips on the first edge and ignores all others "until sweep is complete"... it's called BLANKING ;-)

...Jim Thompson

Yeah. I hate to write ECOs.

John