hi i m a student of electrical engineering 2nd year.i want to design a mini project in verilog HDL .CAN ANY ONE HELP ME.
can any one help me
May 30, 2006
3 Replies
I think the standard rate is 35$ an hour in SED.
Maybe you could say more about your problem?
martin
If you do a Google search for things like "Verilog tutorial" you will find many resources. If you go to the Xilinx website, you should also be able to search for tutorials--sample FPGA and CPLD designs that use VHDL and Verilog. You can, for a pretty low price, buy a "starter kit" from Xilinx that includes both a CPLD board with two different CPLDs and an FPGA board with a Spartan-3 series part, a power supply, a programming cable, and design resources that include at least one tutorial that includes a Verilog section. I suppose other FPGA/CPLD suppliers have similar products to introduce you to their parts and their recommended design flows. It's up to YOU to decide just what "mini project" you want to do, of course, and then figure out what's needed to accomplish that project.
(Martin is apparently pretty cheap; I'd charge WAY more than that.)
Cheers, Tom
Well, thats teaching Verilog, but I'd have to buy a book on it first :-)
martin
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