AC coupling is easy

On Aug 8, 2018, John Larkin wrote (in article):

I?m not sure I understand what?s being attempted here, but what popped into mind was a very lossy lumped-element transmission line of sorts, being a string of SMT resistors over a ground plane (on the opposite side of the board), so the capacitance can be balanced by the inductance of the resistors.

One could also have a resistor string on both sides of the board, to form a very lossy twinlead transmission line.

Joe Gwinn

The problem in the originally-posted AC coupling circuit is to keep the first resistor, or equivalently the first part of a lossy line, from frying.

It was interesting because it's one of those problems where every solution path hits some different roadblock. That usually suggests violation of some basic conservation principle, Mother Nature in a foul mood.

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I suspect a long carbon comp resistor from the 1920s might do it.

NT

Probably a long spiral-element thickfilm would work too, like a Caddock. But we prefer surface-mount, and I don't have a lot of room for a long part.

So, two guard electrodes, one at GND, one at pulse input V; the two-resistors case only needs a divide-by-two, so it doesn't take anything elaborate in design, symmetry alone will get a divide-by-two accurate enough.

HV stacks always have guard electrodes all over 'em; it's just the nature of the game. Heck, even HV transistors are made with printed-on guard rings to keep the C-B fields a little more uniform where it counts.

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I bet a printed resistor would work, ie a thick film of ink onto the pcb, b ut I doubt you've got the stuff to do that.

You could presumably live with stray capacitance if your R stack takes it i nto account in terms of how it affects V sharing, it just means more resist ors. Whatever you do is going to take a long resistive element. Can one get carbon film power Rs?

NT

That would probably be worse. The air under the resistor helps.

A 1200V pulse with ~2 ns edges gets you 600,000 V/us, which is 120 mA into 0.2 pF.

That "lunatic fringe" thing again.

Cheers

Phil Hobbs

Phil Hobbs wrote

I was thinking if the pulse came from a transformer (winding) it would always be average zero. Design change?

Right. I have that same issue making a scope monitor pickoff divider: crazy peak current into a 1 pF divider cap. Don't get me started about inductance. [1]

If I thermal image the board, I'm seeing what should be plenty fat traces running hot. Skin effect. Using thicker copper wouldn't help.

I'm about ready for some low-frequency micropower design.

The output pulses come from mosfets. As the pulse rate goes up, the average DC component increases. I don't like the AC coupling, because it shifts the baseline negative and costs a bit of peak positive amplitude.

I wish I could get a transformer or autotransformer to work here. I could get more voltage out.

Cannot tell without seeing the circuit, but is that the thing with the big coil and does the pulse come from that coil?

I'd hate to rely on a standard 1206 resistor exposed to 600V even if its fo r few ns. My guess is most resistor manufactures don't perform routine 400G V/s slew rates tests either. Having repaired SMPS for a living I came acros s many failed startup resistor strings (typically 400V DC across 4 * 1/4W r esistors). Usually go open or some just increase resistance, despite operat ing at 1/3 of advertised rated voltage.

I am really curious, how do you generate this waveform ?

A 1200V pulse in 7ns would have more than 400GV/s rise/fall slope. Thats 0.

Can't post that, sorry.

Here's my probable AC coupling and 100:1 pickoff circuit:

I'll probably have to tweak that 68 pF to set the gain, once it's on the board. It simulates nicely, but so did the two previous circuits.

John Larkin wrote

sigh I wonder if you could split R3 and take the monitor signal from there...

With a given board capacitance, and given R3, and given load by the MOSFET circuit, and a trimmer cap

HV+ | [ ] R1 C1(parastic) | |-----------------------| MOSFET | | [ ] R2 =/= trimmer | | C2 /// ///

R1 + R2 = R3 where R1 * C1 = R2 * C2

:-)

Would the 2N7002 be doing much buffering given its relatively high capacita nce. I'd suspect a fast NPN with a low Cbc would be a more accurate buffer for pulses in the nano seconds. If you reduce 24V supply to say 15V you hav e any number of 'slow' RF transistors of choice.

Adam

No.

Production doesn't like trimmers, and I don't think you can make the numbers work anyhow.

I don't need DC coupling, so there is no need to combine the AC coupling with the pickoff.

The mosfet does need some DC bias current.

I considered an RF NPN, but I'd need a lower supply (I have +24) and would have to reduce output swing. And biasing up the base is tricky, given the typically low beta of RF transistors. The mosfet is easy.

(People assume that a 1 GHz transistor works at 1 GHz, but it only has a beta of 10 at 100 MHz. One of my kids made a similar mistake last week; she assumed that she could use a 4 MHz opamp to make a TIA that would be accurate at 250 KHz.)

(And the NPN RFs are fast fading away. BFT25 is now EOL!)

There is so much ground loop noise on this board that I need a big pickoff swing. The rev A board had a 1000:1 passive divider, where the numbers work in theory but the picked-off pulse was buried in ground loop rings.

Most of the capacitance in the mosfet is G-S, which is bootstrapped in the follower config. It simulates OK. I could use a fast opamp but the

As noted, the typical high-voltage scope probe fries when probing this signal long-term.

The thermal problems are worse than the electrical ones.

Hiding the HV circuitry inside potting compound is the usual cure for its hot spots. It's a production step or three that you are avoiding (successfully, it sounds like).

Potting is awful. Expensive, messy, and makes probing and repair impossible. Epoxy doesn't conduct heat very well anyhow.

My critical parts are sitting on aluminum nitride insulators, which sit on an aluminum baseplate, which is water cooled.

Smaller parts have PCB topside copper pours, then thermal vias to a big bottom pour, then gap-pads to the baseplate. Fighting capacitance of course.

The worst parts are the microscopic EPC GaN fets. Their power density is absurd.