fast AC coupling

I have a fast (10s of ps edges) pulse that I want to AC couple. The bias on the source side will be 15 volts, and the load is 50 ohms to ground. I need at least 1 uF to minimized droop, preferably more. The

50 ohm trace is 45 mils wide.

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The 0204 fits the trace nicely but doesn't have enough capacitance at

15 volts. The 0603 is too small too, and has more inductance than I want. 0306 doesn't have enough capacitance either.

A 10 uF 16V 0508 kinda works. It will have roughly 1.5 uF left at 15 volts. It does bulge out a bit from the trace width, which adds capacitance and maybe a little inductance. I guess I could teardrop the traces and then cut away a little ground plane to correct for the extra capacitance. That's hard to calculate.

Any suggestions on how to do fast-edge-long-tau AC coupling on microstrip?

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John Larkin         Highland Technology, Inc 

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jlarkin
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As coupling is good for low duty cycle pulse information. If the pulse rate is too high an intelligent discharging circuit may be required to keep the baseline ground from creeping up. Not really what you are asking...but tha t is my 2 cents on as coupling pulses

Reply to
bulegoge

Luckily, my duty cycle will be low.

Intelligent discharging would be tricky at these speeds. Schottky diodes are semi-intelligent, I guess, but I begrudge every tenth of a pF.

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Actually, there could be 20 volts across the cap. I wouldn't worry about blowing out a 16v ceramic cap, but it will lose even more capacitance as the voltage increases.

4.7 uF at 25v is available in 0508. That would have about the same capacitance at bias as the 10 uF 16v part.
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John Larkin         Highland Technology, Inc 

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jlarkin

ate is too high an intelligent discharging circuit may be required to keep the baseline ground from creeping up. Not really what you are asking...but that is my 2 cents on as coupling pulses

I hope you have this info from the data sheet or you've tested it. Often t he V-C curve is the same for different voltage ratings rather than being re lated. Without hard evidence I wouldn't count on any assumptions.

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  Rick C. 

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Rick C

You're talking quite low frequencies for the droop issue, why not create two pathways, one for GHz and high NHz, the other for below that. Bias-T style.

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Reply to
Winfield Hill

Capacitance loss with voltage is characteristic of nonlinear materials; those are piezoelectric, so will ALSO ring like a bell from your fast edge; the long tail won't be quiet.

Reply to
whit3rd

The widest pulse will be about 200 ns. But every time we design a really spiffy fast box, some potential customer calls and asks for a slower version!

1 uF and 50 ohms is 50 us tau, which will droop 0.1% every 50 ns. If we ride on the Vpi flat top of the eom transfer curve, the optical droop will be much less.

Two pathways sounds difficult.

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John Larkin         Highland Technology, Inc 
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John Larkin

I'd probably try to move the ground plane down to a lower layer for that part of the board, with a row of vias to stitch the groundplanes together where the groundplane steps down. That way you could use e.g. a

0.1" trace for the 50 Ohm microstrip line, and fit much more capacitance across the gap in it. Some SMA edge launch connectors also work better with a wider microstrip line on the PCB, so it might be unnecessary to go back to a narrow trace on the other side.

Optimising the part where the microstrip trace gets wider and the groundplane gets lower would be easier with a field solver, but as you have TDR equipment, you could lay out a couple of dozen random options and for not much money get them made and pick the best one.

Reply to
Chris Jones

It's a 4-layer board, with, tenatively, 25 mil outer dielectrics. So the ground plane is 25 mils below the microstrip. The amp and microwave SMA connector have a tiny pins so a 45 mil strip isn't bad.

One idea was to use a bigger cap and teardrop into it, and punch a hole in the ground and power planes below to make up for the lump of capacitance. But that's hard to simulate (Sonnet Lite maybe?) and I'm not eager to do a dozen experiments.

One of my guys may still have access to a student version of a serious em simulator.

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John Larkin         Highland Technology, Inc 
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John Larkin

Chris Jones wrote in news:la5UF.59602$ snipped-for-privacy@fx06.am:

The tried and true method.

Reply to
DecadentLinuxUserNumeroUno

If you're using "normal" PCB thicknesses, with their fairly-wide 50-ohm traces, you could diverge a thin trace, that won't siphon off much of the GHz signal, and yet providing a "DC signal" that you can route along-side the 50-ohm GHz signal. After its LF AC coupling job, you can merge it back in the same way, Maybe add some resistos to further the GHz isolation. You'd need to have final high-Z loading at low freqs.

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Reply to
Winfield Hill

A small, fast cap that spans the trace could be connected to a big ugly cap, maybe through a couple of small inductors. I might Spice that.

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John Larkin         Highland Technology, Inc 
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John Larkin

So what did you do? Get the board made (and populated) before you realized this was a problem?

And what are the consequences of too much droop? If it's a minimum amplitude at the load deal, then there are things you can do like add some pre-bias in series with coupling capacitor to maintain amplitude during the pulse.

You may have to butcher the board and write it off as a proto to a finished working product.

Reply to
bloggs.fredbloggs.fred

We're entering the hand-drawn schematic into PADS now. Then reviews, and then layout.

It's a probabilities thing. The better it works, the more likely that people will buy them.

We don't prototype products. We design and release rev A, and manufacturing builds some first articles that we test, and we prefer that rev A be a sellable product, which is usually it. This one is scarier than most.

How do you develop products?

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John Larkin         Highland Technology, Inc 
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John Larkin

There's always the transmission line transformer approach. You can get a lot of inductance by wrapping a long length of twisted pair around a decent sized pot core.

For 10psec edges you might have to go for sub-minature coax, and wrap it around a decent-sized toroid.

The practicalities depend on the details that you haven't specified.

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Bill Sloman, Sydney
Reply to
Bill Sloman

Is this a design for rough handling? Otherwise, what about a manual solders inverse pyramid of a small HF capacitor on the transmission line and higher values, largers size capacitors with increasing size on top ?

Cheers

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Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de 

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Uwe Bonnes

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