As i understand it, very few DACs are two quadrant multiplying; plus some digital potentiometers are logarithmic (volume controls).
?-)
As i understand it, very few DACs are two quadrant multiplying; plus some digital potentiometers are logarithmic (volume controls).
?-)
" snipped-for-privacy@fonz.dk" wrote in news: snipped-for-privacy@g9g2000vbl.googlegroups.com:
And both internally contain a Dig-TO-AN convertor.
a
stack.
oscillator,
It does look like a nice one. I just noticed the RC self-timing and that its datasheet mentioned the 555, so naturally I had to tease Bill about it. ;)
Cheers
Phil Hobbs
snipped-for-privacy@g9g2000vbl.googlegroups.com:
technically yes, but .. one can't always replace the other so you better ask for the right thing
-Lasse
a
stack.
oscillator,
Well, there are a few obvious ways to make an RC oscillator. It's unfortunate that anything that does it one of those ways gets guilt-by-association from the 555.
is a
stack.
oscillator,
90The IR data sheet mentioned the 555 (according to Phil). Not surprisingly the 555 timer uses a basic fundamental technique to make accurate R/C oscillators.
Can you show us the other "few obvious ways to make an RC oscillator"? ...Jim Thompson
Another way is drive the capacitor in phase and the resistor antiphase and use a single threshold
.----+-\/\/\-. | | | | === | | | | `-|>-+--|>o--+--
sometimes done with both buffers inverting and the cap and resistor swapped. eg 4060.
and a third way...
umm an avalanche oscillator? .----------- out | +V --/\/\/--+-/\/\/--|\|--.
None of the CMOS inverter oscillators are very accurate, or stable, due to the ESD diodes getting in the way of natural logarithmic timing.
A fix that works well is...
or on-chip where ESD isn't present...
Extraordinarily unstable. ...Jim Thompson
Of course with nasty voltage-dependent capacitors, the 555's ratiometric scheme loses a lot of its PSR as well.
Cheers
Phil Hobbs
Only because of the crappy capacitor. In any production environment I've always opted for COG/NPO.
In my chip designs I use the version shown in the second link quite a lot. The chip capacitors I use are MOM (metal-oxide-metal) which are quite stable, just a +/- 20% initial value spread. In critical applications, some kind of trim procedure is used, sometimes laser, sometimes an auto-trim procedure when the chip "boots" up. ...Jim Thompson
innews:kmlef7$eae$ snipped-for-privacy@tdi.cu.mi.it:
is
of
with
Umm no. A fully floating (within the supply rails) variable voltage ratio. At least that what one of the spec sheets i read said.
?-)
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