Protel quick question

If a Top Overlay (component outline) track runs through a padstack or or a Top Layer pad, will this cause any Gerber or production problems?

Thanks,

Ivan

Reply to
Ivan
Loading thread data ...

Component outlines are merely visual guides. So far, all of them seem to be larger than the actual parts, especially for resistors and capacitors. It seems the larger the part, the closer he outline given is to the actual part outline. In one case, i overlapped resistor outlines and then ran a trace between the resistors. The only time outlines might be used in a gerber, is for a silk-screen part layout guide. And i personally do not think it worthwhile, as the pick-and-place files, combined with the BOM file cover that very well. It is not like some junior tech that is going to bend a chassis, punch it out, put in the tube sockets, and sit down, cut wires, add 90 degree bends, make cable harnesses, and solder them to tube sockets (1920-1940s type construction).

Reply to
Robert Baer

Thank you. I appreciate your attention. Your reply is always welcome and appreciated. I will follow suit.

Ivan

Reply to
Ivan

Yes. Pads partly covered by silkscreened annotation do not solder well.

I think Protel can be set up to warn you with a design rule, Camtastic may be able to automatically fix the problem at gerber level.

Your board house may also fix the problem but won't be happy that they had to.

Reply to
nospam

The gold star goes to "nospam".

As mentioned by nospam, silkscreen (epoxy ink) on your pads can be very detrimental to the integrity of your solder joints. Normal practice is to clear the silkscreen (overlay) from the pads by a minimum of 5mils for most modern fabrication houses. It could be more for the lower end and hobbyist fabricators (10 -

15 mils). As 'nospam' also mentioned most fabricators can and will clear the silkscreen from pads for you, there may be a nominal/minimal additional charge for this service. Just be sure to ask them specifically for this if you need it done to your board, otherwise it may be hit/miss whether they do it on their own accord.
--
Sincerely,
Brad Velander

"nospam"  wrote in message
news:93m721dtemir3ag31hkhgukbi9i3p35m8r@4ax.com...
> Ivan  wrote:
>
> >If a Top Overlay (component outline) track runs through a
padstack or
> >or a Top Layer pad, will this cause any Gerber or production
problems?
>
>
> Yes. Pads partly covered by silkscreened annotation do not
solder well.
>
> I think Protel can be set up to warn you with a design rule,
Camtastic may
> be able to automatically fix the problem at gerber level.
>
> Your board house may also fix the problem but won\'t be happy
that they had
> to.
Reply to
Brad Velander

Again, Thanks one and all for sharing your expertise.

Ivan

Reply to
Ivan

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.