Problem with gerber file names

It's usually submitted as a fab drawing, not a gerber. It has the outline plus materials, stackup, color, and tolerance notes.

John

Here is a typical text file I send out with my boards. Last time I had to convert my Gerbers to extended-Gerber, which cost me some work but OTOH elliminates a potential source of error (D-codes are embedded in the x-Gerber).

Here is the file (just inserted as it is, hopefully it is of some use):

-------

25 - 59.8 mil (1.52 mm) circle, 27 - 63 mil (1.6 mm) circle.

Drilling tools:

1 - 0.3 mm (about 0.2 after plating), 0.2 drilling is also OK, 2 - 1.0 mm, 3 - 1.0 mm, 4 - 1.0 mm, 5 - 1.3 mm, 6 - 3.1 mm, 7 - 2.0 mm.

The board must be cut by the contour of one of the inner layers (e.g. layer 2, ipnl2.gbr) as if the cutting tool has zero width and moves through the middle of the countour line.

The stackup is as following: ipnl1.gbr ipnl2.gbr ipnl3.gbr

ipnl4.gbr ipnl2.gbr ipnl5.gbr

Total board thikness apr. 1.5 mm or so (perhaps 1.6 is popular nowadays).

The spacing between ipnl2.gbr (the GND layer) and its neighbour layers, both in the top and bottom 3 sets, must be something like 6 mil or so (so the impedance of the top and bottom signal layers referenced to the neighbour GND layer is about

50 ohm). All this assumes FR4 material.

The signal layers have been routed with 5 mil gaps and traces in mind, with 4 mil spaces when passing close to vias/BGA pads. The Gerber files have been verified to pass a 4 mil gap check.

For any questions please contact Dimiter Popoff , or Skype didi_tgi (or call ++359/2/9923340 )

-----

Dimiter

Oops, part of the file was lost, here I go again:

Here is a typical text file I send out with my boards. Last time I had to convert my Gerbers to extended-Gerber, which cost me some work but OTOH elliminates a potential source of error (D-codes are embedded in the x-Gerber).

Here is the file (just inserted as it is, hopefully it is of some use):

------- File description: ipnl1.gbr - top signal layer (layer 1), ipnl2.gbr - GND plane layer, goes as layer 2 and 5, ipnl3.gbr - internal plane, layer 3, ipnl4.gbr - internal plane, layer 4, ipnl5.gbr - bottom signal layer (layer 6).

NOTE: ipnl2.gbr, ipnl3.gbr and ipnl4.gbr are plotted as NEGATIVES. They are all copper planes except for the lines and pads plotted on them.

ipnsm1.gbr - solder mask for top layer, ipnsm2.gbr - solder mask for bottom layer.

D-codes:

11 - 4.3 mil (0.11 mm) circle, 12 - 6.3 mil (0.16 mm) circle, 14 - 9.8 mil (0.25 mm) square, 15 - 9.8 mil (0.25 mm) circle, 16 - 11.8 mil (0.30 mm) square, 19 - 17.3 mil (0.44 mm) circle, 21 - 20.1 mil (0.51 mm) circle, 22 - 50 mil (1.27mm) circle, 23 - 55.1 mil (1.40 mm) circle, 25 - 59.8 mil (1.52 mm) circle, 27 - 63 mil (1.6 mm) circle.

Drilling tools:

1 - 0.3 mm (about 0.2 after plating), 0.2 drilling is also OK, 2 - 1.0 mm, 3 - 1.0 mm, 4 - 1.0 mm, 5 - 1.3 mm, 6 - 3.1 mm, 7 - 2.0 mm.

The board must be cut by the contour of one of the inner layers (e.g. layer 2, ipnl2.gbr) as if the cutting tool has zero width and moves through the middle of the countour line.

The stackup is as following: ipnl1.gbr ipnl2.gbr ipnl3.gbr

ipnl4.gbr ipnl2.gbr ipnl5.gbr

Total board thikness apr. 1.5 mm or so (perhaps 1.6 is popular nowadays).

The spacing between ipnl2.gbr (the GND layer) and its neighbour layers, both in the top and bottom 3 sets, must be something like 6 mil or so (so the impedance of the top and bottom signal layers referenced to the neighbour GND layer is about

50 ohm). All this assumes FR4 material.

The signal layers have been routed with 5 mil gaps and traces in mind, with 4 mil spaces when passing close to vias/BGA pads. The Gerber files have been verified to pass a 4 mil gap check.

For any questions please contact Dimiter Popoff , or Skype didi_tgi (or call ++359/2/9923340 )

-----

Dimiter

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Where can you get a square drill?

These do not refer to the drills. These are the "D-codes". These shapes are used to draw the artwork.

See

It's been a long time since I used OrCad, but I think you'll find the board outline is in the '.DRD' file. You can also get it to include the board outline in the copper layer files ('.TOP' & '.BOT').

--
John B

martin

In Protel, *.GKO would be the keep-out layer, which would rarely match the board outline.

I put the board outline on a "mechanical" layer, then ask the Gerber output routine to include that layer on all copper layers. I can then instruct the board shop to trim the boards to the outline - seems to work fine for me.

In any case, you have to tell the shop the board outline somehow - either by including it on the copper layer, or by providing a separate file.

The readme file I send with my Gerbers looks like:

=================================

Job: 0983 TRIUMF Octal DAC PC Board P-13190 rev 0

The following files are required for this job: p13190.GTL Component side copper photoplot file p13190.GP1 Internal Ground Plane p13190.GP2 Internal Power Plane p13190.GBL Solder side copper photoplot file p13190.GTO Top Component layout silkscreen p13190.GBO Bottom Component layout silkscreen p13190.GBS Bottom Solder Mask p13190.GTS Top Solder Mask p13190.TXT Drill file readme.txt This file

Note: the Gerber files include embedded aperture data.

Tool Hole Size Hole Count Plated Tool Travel

--------------------------------------------------------------------------- T1 16mil (0.4064mm) 343 112.54 Inch (858.64 mm) T2 25mil (0.635mm) 9 36.08 Inch (916.40 mm) T3 35mil (0.889mm) 172 77.13 Inch (1959.06 mm) T4 40mil (1.016mm) 10 5.77 Inch (146.46 mm) T5 50mil (1.27mm) 12 16.87 Inch (428.41 mm) T6 55mil (1.397mm) 6 3.68 Inch (93.48 mm) T7 110mil (2.794mm) 10 27.68 Inch (703.05 mm) T8 141mil (3.5814mm) 4 11.60 Inch (294.54 mm)

--------------------------------------------------------------------------- Totals 566 291.34 Inch (7400.04 mm)

The board is 7.20" x 11.95", +/- .010", four layer, .0625" nominal thickness, FR-4 material

1 oz or greater copper Standard through-hole plating, standard white tin plating on exposed copper. Standard gold plating on edge connector

Solder mask both sides (different masks) Component Ident silkscreen on both sides

Trim boards to outline on component side artwork

--
Peter Bennett, VE7CEI  Vancouver BC, Canada
peterbb4 (at) interchange.ubc.ca  
new newsgroup users info : http://vancouver-webpages.com/nnq
GPS and NMEA info: http://vancouver-webpages.com/peter
Vancouver Power Squadron: http://vancouver.powersquadron.ca

Bet they hate you making them strip the outline from every gerber layer before they plot it.

Give them an outline on a separate layer, they will either just look at it or use it as a guide for creating a route.

I always give a paper (well PDF) copy of that layer including basic dimensions and showing holes one of which is dimensioned so there can be no confusion about alignment between gerbers and drill files.

Gerber isn't an intelligent format. You could put the outline on any layer (I have gotten in some pathetic gerber files at times). But the proper place for the board out line is eiter on your drill drawing or on a seperate mechanical layer you make. You will have to go into your gerber set-up and add the outline layer to your drill drawing gerber output if it is not already putting it their (or create a new one called Mechanical). I haven't used Orcad in 15 years, can't help much on the details of the process.

Its probably NOT that the company can't use Orcad Gerber, its simply that the outline layer is not in any gerber file. How can they figure the outline if it is undefined in the files? Or, I could be wrong and they are incompetent. If you email me the gerbers (if nothing top secret), I would be happy to take a peek.

Brian

------------------------- Rising Technologies, Inc.