You need a device-level model. I don't know where you can get it.
...Jim Thompson
You need a device-level model. I don't know where you can get it.
...Jim Thompson
Ok, a few points... First, remember that your switch is not a true open/close switch, but instead is a big resistor/little resistor switch. Since your input is floating and has a big input resistance, it doesn't do much when it switches on or off. Best simulation of this type is done using a Vpulse as your source. This gives you true voltage swings, and you can then eliminate the Tswitch and cap.
Second, there is no load to ground on your output. Different models handle this differently, but I have seen some very 'interesting' results when that output is floating. Put a 10K resistor to ground on the output to protect against that.
Depending on your model, you still may not see the effect you are looking for. The student version uses pretty simplistic models...
Charlie
I have to measure the BIAS current in a uA741, by using the following schematic:
With real instrumentation (function generator, 20 MHz scope...) all is ok: the switch is initially closed; after some second it's open, then in output you can see the offset of sine signal decreasing up to take the falling sine signal to the saturation (negative) due to integration of the BIAS current.
Now, I have to repeat the lab with PSpice and I am not able to reproduce it such as we did it in laboratory: in Probe I get always a sine 1V/-1V without the "falling" effect...
I was wondering how I can to config PSpice in order to achieve this result; I tried to chanhe various settings with no effect. I'm using PSpice Student version.
Thanks in advance
Il Fri, 09 Dec 2005 16:15:34 -0800, Charlie Edmondson ha scritto:
But the very strange thing is that with crappy Electronics Workbench all runs fine...I'll try to use a different circuit (integrator without Rfeedback, with input resistor grounded).
All spice programs require a DC path to all nodes. When the switch is open this is not the case in your circuit. You need to put a very large resistor in parallel with the capacitor.
Ian
"Francesco" schrieb im Newsbeitrag news: snipped-for-privacy@localhost.localdomain...
Hello Francesco,
I wonder why you ignore my advice from sci.electronics.design to use the correct switch TOPEN. Do you just want just blame PSPICE. Sorry, but most propably it's your fault.
Garbage in -> Garbage out
The models between simulators may be too simplified, but the uA741 from my PSPICE-Eval.lib models saturation in a useful way.
Best regards, Helmut
Helmut Sennewald ha scritto:
Hi Helmut here my circuit with LTSpice:
Schematic:
Waveform:
But the Vout waveform doesn't sailing off to the saturation.
"negromonte1" schrieb im Newsbeitrag news:61Bmf.30064$ snipped-for-privacy@twister2.libero.it...
Hello "negromonte1",
The result depends on the features implemented in the model. The developer of the uA741 model below has thought on saturation. This is the model in "eval.lib" of the the PSPICE demo version which I had installed some time ago. I haven't looked what's in the latest demo version.
The model LM741/NS from National Semiconductor indeed doesn't simulate saturation. They simply were too lazy to write a good model. Now I don't wonder why Bob Pease doesn't trust SPICE.
Best regards, Helmut
LTspice schematic: ua741_test.asc
Version 4 SHEET 1 1140 1504 WIRE -192 288 -192 240 WIRE -192 400 -192 368 WIRE -192 528 -192 496 WIRE -192 640 -192 608 WIRE -128 240 -192 240 WIRE -128 240 -128 96 WIRE -96 96 -128 96 WIRE -96 240 -128 240 WIRE -80 160 -80 144 WIRE -32 160 -32 144 WIRE 0 96 -16 96 WIRE 0 240 -32 240 WIRE 0 240 0 96 WIRE 48 208 48 160 WIRE 80 208 48 208 WIRE 80 240 0 240 WIRE 112 192 112 16 WIRE 112 304 112 256 WIRE 112 400 112 384 WIRE 176 16 112 16 WIRE 176 32 176 16 WIRE 176 128 176 112 WIRE 176 160 48 160 WIRE 176 224 144 224 WIRE 176 224 176 160 WIRE 208 224 176 224 FLAG 112 400 0 FLAG 176 128 0 FLAG -192 400 0 FLAG -80 160 0 FLAG -32 160 vs FLAG -192 640 0 FLAG -192 496 vs FLAG 208 224 out SYMBOL Opamps\\\\opamp2 112 160 R0 SYMATTR InstName U1 SYMATTR Value uA741 SYMBOL voltage 112 288 R0 SYMATTR InstName V1 SYMATTR Value -15 SYMBOL voltage 176 16 R0 SYMATTR InstName V2 SYMATTR Value 15 SYMBOL voltage -192 272 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value SINE(0 1.00 1k) SYMBOL cap -96 256 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL sw -112 96 R270 SYMATTR InstName S1 SYMATTR Value SW1 SYMBOL voltage -192 512 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value PULSE(1 0 2m 1n 1n 100) TEXT -208 -48 Left 0 !.model sw1 sw(Ron=1 Roff=1e10 Vt=0.5) TEXT -208 -80 Left 0 !.tran 500m TEXT -208 -112 Left 0 !.include ua741_from_eval.lib
The model file "ua741_from_eval.lib".
--
Now I don't wonder why Bob Pease
Does not trust simulation ... Bob is a VERY practical engineer ... too few of his ilk are around now a days!
"Helmut Sennewald" schrieb im Newsbeitrag news:dnf0ia$95u$00$ snipped-for-privacy@news.t-online.com...
Hello I checked now with the ORCAD 10.0 demo version. I have modified the circuit because I couldn't find the switch TOPEN. Instead I used the normal voltage controlled switch. The value of Roff in the switch has to be changed to 1e10 Ohm. The default is only 1e6 Ohm which is by far too low for this test setup. The simulation results have been as expected after these changes,
I have to admit that this test setup may not work with many opamp models, because they may be often made for operation within the commmon mode range.
Best regards, Helmut
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