Fast Single-ended I/O

I did some tests on a Virtex chip and found HSTL_I good up to 250MHz unloaded with III and IV slightly slower. However, the data sheets seem to imply that the on-chip clock nets can exceed 330MHz(Tch, Tcl = 1.5ns). Is

250MHz the limit for bringing a signal on/off-chip, or was my test poorly executed?
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Adam
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