DDR speed of the XUPV2P Board from Digilent

Hi,

I am doing stuff with Displays. The data rate is about 3 gigabits/s for the pixels. I am thinking about using the XUPV2P from digilent for this application.

Since I would have to read and write at the same time, I would need a data rate of about 6 gigabits/s. Would it be possible with this board?

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regards, Benjamin

Reply to
Benjamin Menküc
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Hi,

In the datasheet I can find, that the board can run DDR ram at 133 MHz. Since the buswidth of the dimm-modules is 64 bit, my datarate is

2*133MHz*64Bit=17 gigabits/s. That would be enough. Am I right?

regards, Benjamin

Reply to
Benjamin Menküc

You may find the following DDR and DDR2 boards interesting:

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Regards,

Reply to
CPU2000

Hi CPU,

I have looked at those boards already. I find them a little bit expensive for me as student. However I think the XUPV2P board would work. I am just wondering why the XUPV2P board can only do ddr1 at 133 MHz... Does anybody know what the limiting factor is?

regards, Benjamin

Reply to
Benjamin Menküc

Why don't you try emailing digilentinc, they usually reply quite promptly.

Alex

Reply to
Alex Gibson

Their e-mail must be more reliable than their web site then. Maybe I'mj ust unlucky, but about half the time I try to go there (including today) I can't get in.

Reply to
Pete Fraser

Hi,

a reload usually fixes this problem for me.

PS: I will ask Digilent about the DDR speed, once I get a response to my first email question :)

regards, Benjamin

Reply to
Benjamin Menküc

Hi,

I talked to Digilent on the phone. They didn't know exactly how fast the ram can go.

Here is what I find in the users guide of the board:

These memory modules are designed for a maximum clock frequency of at least 133 MHz and have a CAS latency of 2.5 (18.8 ns). The PLB Double Data Rate Synchronous DRAM Controller supports CAS latencies of two or three clock cycles. If the memory system is to operate at 100 MHz, then set the CAS latency parameter in the controller design to 2 (20 ns). If full speed (133MHz) memory operation is required, then set the CAS latency parameter in the controller design to 3 (22.6 ns).

What I don't understand is, whether the 133 MHz is the maximum clock or not. Can it run 200 MHz as well?

regards, Benjamin

Reply to
Benjamin Menküc

For that you need to check the DRAM manufacturer... sometimes its not the clock thats so important.. but the time delays.. so at 200MHz you might find it 5-5-5 but 3-3-3 at 133MHz

Simon

Reply to
Simon Peacock

While we're on the subject - does anybody know of an EDK reference design for the XUP2VP, particularly one exercising the DDR slot? I looked on the Digilent website but didn't see anything, nor on the xilinx.com page dedicated to the board.

Thanks,

John

Reply to
John Williams

Hi,

I am looking too for reference designs. The guy from Digilent told me on the phone, that they are waiting to receive the promised reference designs from Xilinx, to put them on their homepage.

Maybe someone from Xilinx knows when they will be available.

regards, Benjamin

Reply to
Benjamin Menküc

I now have a preliminary version of a MicroBlaze-uClinux capable reference design, including EDK 7.1 project, bitstreams and kernel images, hosted on the MicroBlaze uClinux home page

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I call it preliminary because there is still a bit of tweaking to be done, however it should provide a good starting point for you to work with this excellent board.

Note the design was provided to on an "as-is" basis, so please do not contact Xilinx for support. Actually I see that the Digilent site now has a lot more resources, including this same reference design:

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Regards,

John

Reply to
John Williams

Hi,

thanks. The reference designs look nice.

regards, Benjamin

Reply to
Benjamin Menküc

sir i am working on image processing project with deals with implementation of it on xc2vp30 device but to to run my code on board i need to set pins AC11 and AD11 can you please tell can i find the pin on board . i have searched in all data sheets and cannot find the pin location.

thank you in advance

Reply to
impanaeng

The schematics are at:

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The two pins you mentioned connect to DIP switch SW7. I'm not sure what that has to do with the DDR speed. Did you expect these pins to supply a clock?

--
Gabor
Reply to
GaborSzakacs

thank you for your reply

the pins ac11 and ad11 which i have assigned are for reset and to start the block which need to be varied after each clock pulse.so i thought it should be given as data inputs to the board.

Reply to
impana

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