1ns max jitter oscillator, cheap - for fast 4 diode sampler

I heard about a couple who drove all the way around Vienna twice on the ring road looking for the exit to Vienna. They saw "Wien" signs on every exit but thought that just mean "Exit". :)

BTW The rule of thumb in German for "ie" vs "ei": pronunciation follows the *second* letter. "Ei" meaning "egg" is pronounced "I".

Clifford Heath.

The thing Wien bridges are good at is low-distortion audio sine waves. All you need is clean AGC with a good time constant and you get very nice sines.

Heh, cellphone chips are very much optimised for low cost. If you make a billion of something, you will spend a lot of engineering effort and other NRE, even just to shave 0.1 cents off that thing.

You can see it like that, if there is so much of it that it is quite bad, at offset frequencies related to the "long time later".

You can also see it directly with a spectrum analyser (provided that has a much cleaner LO than what you are measuring). Sometimes it helps to notch out the carrier (if you are only interested in noise at high offsets). Note that with this method you will also see AM noise, which might be useful or might be a distraction, as for example in a mixer LO signal, the AM noise may be largely rejected by the mixer. **

You can buy a special instrument calles something like a "signal source analyzer" from keysight, that does it.

There are a lot of cheaper methods which are tricky to do properly, e.g. phase lock two oscillators together in quadrature and mix one with the other, then you know the combined noise of the two oscillators. If one of the oscillators is known to be very good, that is enough:

Otherwise, if you do that with all possible pairs from a set of 3 oscillators you can still get out the absolute phase noise.

Or you can mix an oscillator with itself, but with a long delay line in one path. It's a long time since I have done it so I can't remember all of the ways.

You might as well read all the notes on the Wenzel site, it has far better information than what I can remember.

** There are a lot of ADI DDS chips that lack a pin to bypass the DAC reference and these are said to have poor AM noise. Here is a page showing some methods of investigating this as well as measuring phase noise:

Yeah but you can use gajillions (technical term) of transistors all you have to do is just draw them!

the cost rapidly increases when you not an IC designer and have to kludge something together from off-the-shelf parts that don't really fit the bill.

The context of that sentence was for the use-case of IC design a la the Infineon patent.

My impression of the thrust of the papers I posted was that in certain-use cases where you need tunability so a fixed-frequency crystal osc is out, and don't want the added complexity of an LC VCO and/or PLL frequency synthesizer, that the humble Wien actually isn't that bad for generating a timebase. Not as good as the crystal or VCO, but better than anything else.

I wonder what kind of precision you could get by simply hitting the varactor with the trigger signal (or rather an amplitude-stabilized version of it, such as the output of a fast comparator) and watching how the phase difference changes over time. If the oscillators started out phase-locked to each other before the trigger event came in, then their phase difference would be an indication of how long ago the trigger happened.

There have been various hacks along those lines such as sending the trigger through a SAW filter and measuring the phase of its ringdown waveform with an ADC, but the one I'm thinking of was patented fairly recently.

-- john, KE5FX

LVDS receivers make great fast RRIO comparators. We pay 55 cents for SN65LVDS2DBVR.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics

Am 09.05.19 um 04:50 schrieb John Miles, KE5FX:

Would that be Prof. Prochatzka from Prague?

73, Gerhard

Sounds familiar. I remember some Polish- or Czech-sounding names from their poster session a few years back.

-- john, KE5FX

You could make a picosecond (or femtosecond) accurate time-interval counter that way. Bang a resonator at an incoming trigger edge and digitize the ringing waveform with an ADC, for a bunch of samples. Curve fit to figure out the exact time that the ring started. ADC noise and its clock jitter get averaged out.

Acoustic things like SAWs take forever to damp out, ring like a bell, so can't be used at decently high rep rates. You can kill an LC or a delay line dead in two cycles.

In my case, I want a fast clock that starts instantly at trigger time and is trigger synchronous but crystal accurate. That's the goofy PLL.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics

)

m totally at square one

itter. RC typically have 1us of jitter (found info on the web), and a cryst al oscillator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.

(I could do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)

(with low price in mind)

se

are

r

r reflected pulse. Since I need up to 200m lenth, the maximum time from the emitted pulse to reflected is 3us. So if the jitter is slowly changing ove r time, it may be a lot less in only that time span.

ver 2 USD which is a lot more expensive than a picosecond timing PWM microc ontroller

Yes, that is cheap (a bit slower than my requirements)

But how do you use it as a comparator, since it has large tolerances on the receiver thresholds (100mV)?

Regards

Klaus

ly at square one

RC typically have 1us of jitter (found info on the web), and a crystal osci llator, standard type probably 1ns jitter. But I think that idea was crazy, a PLL clean up, would not work I guess.

d do many samples and average), I would guess I need jitter of 300ps (10%) of my 3ns reolution)

low price in mind)

Have you considered a common emitter negative resistance oscillator using s ome RF|microwave transistor - HFA3134, BFR92A etc?

Am 09.05.19 um 05:10 schrieb John Miles, KE5FX:

< >

But this was published in Sept. 2010, so that could not be the background of a fresh patent.

I've met Prof. P. some years ago in his lab in Prague. Seems like he knows what he's talking about. We had an interface between his SPAD and my time stretcher for measuring photon flight time.

cheers, Gerhard

Am 09.05.19 um 12:16 schrieb snipped-for-privacy@gmail.com:

I had good results with AD8561 in that dual slope thing. But beware of the bias current. It took a FET buffer or it would have interfered with the slow discharge of the dual slope cap.

regards, Gerhard

Sinusoidal injection locking of sinusoidal oscillators is a lot gentler than square wave injection.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC / Hobbs ElectroOptics 
Optics, Electro-optics, Photonics, Analog Electronics 
Briarcliff Manor NY 10510 

http://electrooptical.net 
http://hobbs-eo.com

If you're doing a timing ramp, DC offset becomes time offset, and you can cal that out. 1 ps RMS jitter and 1 ps delay resolution are feasible with a reasonably fast ramp. The FIN1101, LVDS in and out, is even better.

Somebody sells basically the same part, but they call it a comparator and want $4 for it.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics

If oscillator 2 is phase-locked to oscillator 1 then ideally the phase of oscillator 2 shouldn't be getting randomly "whacked" by oscillator 1, yeah? they're locked - isn't that what "locking" is? if oscillator 2's phase is getting randomly whacked then they aren't locked!

It takes some time for a lock to occur though, like the two metronomes on the board that can roll around on top of two tin cans, so it's no good for instant on-off.