AAAARRRRGH! #28 stranded ribbon-cable wire -> protoboard? Hah!
point is to bus all of the even-numbered wires to ground.)Cheers!Rich
24 discussions on ElectronDepot about the Xilinx XC9572XL: what owners asked, what went wrong, and what fixed it.
point is to bus all of the even-numbered wires to ground.)Cheers!Rich
point is to bus all of the even-numbered wires to ground.)Cheers!Rich
Hi, all, Another one that's probably covered somewhere in the docs, but that I can't find there, and a bit of googling has come up with zilch. I'm trying to get ISE 14.6 to assign CPLD pins in some vaguely rational way, e.g. not...
simple JTAG Chain: Atmel-SAM7 ARM --> XC3S1500 --> XC9572XLattempt to configure FPGA with Impact, done not high configuration status register = 0000attempt to program PLD seems to stall forever clicking abort and waiting makes impact again...
This is my first design using programmable logic, so apologies if thisquestion can be found in the datasheet or timing report - I don't know quitewhat I'm looking for.We have a Xilinx XC9572XL (10ns) being driven by either a 12.288MHz or...
I have twenty Xilinx XC9572XL VQFP64. Their sealed package has been open twomonths, and stored in an office with no temperature/humidity control. Now Iwant to get these devices soldered in for a pre-production run.If I put these in without...