Field-Programmable Gate Arrays

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microprocessor design with vhdl

Hello,i have knowledge of basic vhdl and i have implement a few fundemental programs on digital circuits. Iam very new...
0 comments posted 14yrs
posted by jvkphysics
0 comments posted 14yrs posted by jvkphysics

FPGA development

Hello I am very new to FPGA's (background being ASIC design). I would like to map some designs onto FPGA's as a startin...
17 comments posted 14yrs
posted by livid16
17 comments posted 14yrs posted by livid16

Peter Alfke has passed away

Those who've been on this newsgroup for any period of time will remember Peter Alfke, the Xilinx legend, and his infect...
19 comments posted 14yrs
posted by suhaib
19 comments posted 14yrs posted by suhaib

USB hangs on the Xilinx USB II Cable

The Xilinx USB II cable hangs on a regular basis. I've found that pulling the USB connector out and putting it back in...
2 comments posted 14yrs
posted by schvantzkoph
2 comments posted 14yrs posted by schvantzkoph

Altera FPGA weirdness

Hi, We have a new board we just designed, and we're trying to fire up the first one. http://www.panoramio.com/photo/608...
28 comments posted 14yrs
posted by jjlarkin
28 comments posted 14yrs posted by jjlarkin

Synapticad BugHunter and VeriloggerExtreme

Greetings: They gave me a 6-mo eval license for those, which I will begin tinkering with in upcoming weeks. I have so f...
0 comments posted 14yrs
posted by crobcBOGUS
0 comments posted 14yrs posted by crobcBOGUS

Doulos training courses at Xilinx

Hi: While I'm very able to learn on my own, I feel that at my age and with so many people pulling at me every minute, t...
9 comments posted 14yrs
posted by crobcBOGUS
9 comments posted 14yrs posted by crobcBOGUS

Spartan changes in glitch sensitivity

Hello, all, I know this refers to graveyard parts, but we have reason to keep using them. Anyway, I made a new batch of...
16 comments posted 14yrs
posted by elson
16 comments posted 14yrs posted by elson

Microblaze Resources such as BRAMS, LUTS

Hello all, I am a newbie in the FPGA stuff!.. I wanted to know some FPGA resource consumption by the microblaze but cou...
2 comments posted 14yrs
posted by hrishi24h
2 comments posted 14yrs posted by hrishi24h

high speed place and route about xilinx

Now I am troubled that I must wait several hours to compile large circuits,and the place and route result is different...
3 comments posted 14yrs
posted by bjzhangwn
3 comments posted 14yrs posted by bjzhangwn

Is it possible to use a remote desktop viewer on NIOS Linux

Hello , I am having a project where I need to take control of a pc or a smart phone which has a VNC server using FPGA s...
0 comments posted 14yrs
posted by ahmed.abdelfattah.elshemisy
0 comments posted 14yrs posted by ahmed.abdelfattah.elshemisy

Xilinx EDK: XPS netlist combination error

Hello all, Does anyone know why I keep getting errors like this: " ERROR:EDK:708 - Can not get list of netlist files fo...
2 comments posted 14yrs
posted by removethis_finnstadel
2 comments posted 14yrs posted by removethis_finnstadel

Spartan-6 PCI speed

Hello all, Has anyone used XAPP1052 for testing the speed of the PCI hard macro in the spartan-6 LXT FPGAs ? What speeds...
0 comments posted 14yrs
posted by removethis_finnstadel
0 comments posted 14yrs posted by removethis_finnstadel

VHDL connection problem

I have a memory that output a 64-bit slv. I have another module that has a record type with a data 64-bit slv input. I...
3 comments posted 14yrs
posted by maxascent
3 comments posted 14yrs posted by maxascent