ADC by using counter method on FPGA using VHDL language

Hello,i have some idea about vhdl.I want coding of ADC by using counter method on FPGA by using VHDL.. I know the some idea about this program the following process. a) first reset the counter b)the references and analog voltages are equal then gate can be closed.then the the value can be stored in the couters i.e., the value in counter is equavalent to digital value to analog input. I want coding the above two steps

Reply to
VIJAY KUMAR
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A single-slope ADC is probably so easy to code that if you know how to write the code to use it, the actual ADC logic is trivial.

A dual-slope ADC is nearly so.

So, perhaps you should be inquiring as to how to make a single- or dual- slope ADC _work_, then just write the code.

--
www.wescottdesign.com
Reply to
Tim Wescott

Hi Vijay, please read a little about delta sigma ADCs. Almost every functional element of these can be done in digital logic and the theory is well described. Only a analog comparator and a RC-Lowpass (as DAC for the reference signal) are needed as external devices.

Have a nice synthesis Eilert

Reply to
backhus

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