Field-Programmable Gate Arrays

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XPS vs. Project navigator

Chip : virtex 2 (microblaze) multimedia board company : xilinx Question : On my system i have 2 environments ... Xilinx...
0 comments posted 21yrs
posted by manmeetbhangu
0 comments posted 21yrs posted by manmeetbhangu

Cygwin & Nios II

Hi, Awhile back I tried having Nios II and a separate cygwin (from cygwin.com) on the same machine, but ran into big pr...
4 comments posted 21yrs
posted by psommerfeld
4 comments posted 21yrs posted by psommerfeld

DCM Cycle-to-Cycle Jitter

Is anybody able to tell me anything about working out the cycle-to-cycle jitter of a DCM output? The situation is that...
2 comments posted 21yrs
posted by jeremy
2 comments posted 21yrs posted by jeremy

EDK 7.1 : ML40x / ML401 Reference Design

Hi all, I have just upgraded from the 6.3 version of the EDK to the 7.1 version. For testing purposes i wanted to downl...
1 comments posted 21yrs
posted by pbs
1 comments posted 21yrs posted by pbs

LM4550 AC97 Codec on the XUP board

Hey Guys, I'm running into this insane problem just trying to play some ordinary wave file on a LM4550 audio codec on t...
1 comments posted 21yrs
posted by haider.ali1
1 comments posted 21yrs posted by haider.ali1

LM4550 Audio Codec

Hey Guys, I'm running into this insane problem just trying to play some ordinary wave file on a LM4550 audio codec on t...
2 comments posted 21yrs
posted by haider.ali1
2 comments posted 21yrs posted by haider.ali1

RocketIO decoupling

The RIO User Guide (UG024) stipulates that the RIO supply pins need to be filtered using a Ferrite bead and a capacitor...
4 comments posted 21yrs
posted by enquiries
4 comments posted 21yrs posted by enquiries

obufds attribute problem

Hi, I want to feed data from a piso into a obufds. I have my code attached. When I try to synthesize it, I get this err...
1 comments posted 21yrs
posted by benjamin
1 comments posted 21yrs posted by benjamin

x on ml300?

Hi, I'm trying to write a graphics demo program on an ML-300 board with embedded PowerPC CPU and 128MB of RAM, no graph...
5 comments posted 21yrs
posted by xin.zheng
5 comments posted 21yrs posted by xin.zheng

XC9500 - creating RS485 Mux

Hi all, If anyone can think of why this idea may NOT work, please let me know - I want to try to build this. I need to...
3 comments posted 21yrs
posted by vadimv
3 comments posted 21yrs posted by vadimv

Virtex slow clock multiply options?

Hello, Please forgive me if this is a rather elementary problem. My situation is this: I'm using a Virtex Device (XVC80...
10 comments posted 21yrs
posted by kevin
10 comments posted 21yrs posted by kevin

Synplify warning CL209

Hello, When synthezing the design with Synplify Pro 8.0 it gave the follwoing Warning. CL209 Input port bit of spi_addr...
4 comments posted 21yrs
posted by am.imak
4 comments posted 21yrs posted by am.imak

Proper use of BUFGMUX and DCM in Spartan 3

I'd like to double check my assumptions about using the Spartan 3 DCM in combination with a BUFGMUX. I am trying to use...
1 comments posted 21yrs
posted by barrinst
1 comments posted 21yrs posted by barrinst

RocketIO attribute for TLK3101 or TLK2501?

Anybody can advise me to configure the RocketIO attribute correctly to emulate TLK3101 or TLK2501 SerDes. John.
0 comments posted 21yrs
posted by corify
0 comments posted 21yrs posted by corify