Field-Programmable Gate Arrays

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ip address of fpga

what is an ip addres of fpga... my staff hav given me paper regarding security for ip address of fpga using watermarkin...
0 comments posted 12yrs
posted by moosairshad
0 comments posted 12yrs posted by moosairshad

Lattice MachXO3L - is it available anywhere ?

I've downloaded documetnation on lower part of newcomers - MachXO3. New Diamnond 3.1 has support for chips, but I can't...
12 comments posted 12yrs
posted by brankob
12 comments posted 12yrs posted by brankob

looking for a basic PCIe example

Hi, I'm looking for a high-speed PCI express example, like the one given in this video: https://www.youtube.com/watch?v...
2 comments posted 12yrs
posted by revkarol
2 comments posted 12yrs posted by revkarol

debug access to memory (JTAG?)

Hi, I'm looking for a vendor-independent solution to configure RAM contents on an FPGA without rebuilding the RTL. Is t...
0 comments posted 12yrs
posted by 24789
0 comments posted 12yrs posted by 24789

Xilinx ISERDESE2 deserializer primitive behaviour

Hi, I'm having some problems to understand the exact behavior of the ISERDESE2 primitive. What I need to understand is...
8 comments posted 12yrs
posted by carwer0
8 comments posted 12yrs posted by carwer0

license issue on synplify pro AE

hy everyone, we have a floating license for Libero IDE which has an ACTEL_SUMMIT feature that to my understanding shoul...
4 comments posted 12yrs
posted by al.basili
4 comments posted 12yrs posted by al.basili

[cross-post]path verification

Dear all, I have a microcontroller with an FPU which is delivered as an IP (I mean the FPU). In order to run at a decen...
1 comments posted 12yrs
posted by al.basili
1 comments posted 12yrs posted by al.basili

CoreABC from Microsemi

Hi everyone, I'm currently laying down the architecture of an FPGA which is the main controller for a set of mechanisms...
0 comments posted 12yrs
posted by al.basili
0 comments posted 12yrs posted by al.basili

how add an IP on vivado for Nexys4

hello i have Nexys4 Board (Artix7) and i want to add an IP to microblaze can you help me?
0 comments posted 12yrs
posted by marouen.arfaoui.42
0 comments posted 12yrs posted by marouen.arfaoui.42

full functional coverage

Hi everyone, I'm trying to understand how to improve our verification flow. As of now we have a great deal of unit leve...
13 comments posted 12yrs
posted by al.basili
13 comments posted 12yrs posted by al.basili

cloud design flow

Hi there, I was wondering if there's any one out there working with a cloud design flow which is tool agnostic. The rea...
16 comments posted 12yrs
posted by al.basili
16 comments posted 12yrs posted by al.basili