Field-Programmable Gate Arrays

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PLB IPIF Master Read Failure

I have been reading everyone's comments on how to setup a Master Read, but I have hit a wall. I can make the Read Reque...
0 comments posted 20yrs
posted by andrewgschmidt
0 comments posted 20yrs posted by andrewgschmidt

X-Ray Inspection System

We are specialize in the supply, installation, commissioning and servicing of a range of industrial X-Ray Inspection Sy...
0 comments posted 20yrs
posted by zhanglingmu
0 comments posted 20yrs posted by zhanglingmu

Preserve patent materials through a notary

Hi, I read some books describing that preservation of patent ideas through a notary is valid in the law. Yesterday we p...
6 comments posted 20yrs
posted by wtxwtx
6 comments posted 20yrs posted by wtxwtx

Montavista linux Xilinx Virtex4 ML403

I have a monta vista linux preview kit 3.1 runnig on a ml403 GSRD based design. Now i have the problem to get the linux...
0 comments posted 20yrs
posted by test
0 comments posted 20yrs posted by test

dcm clkin_divide_by_2

When using the dcm clkin_divide_by_2 attribute on a V2P DCM, if the clk0 output is fed into the clkfb input, will clk0 b...
1 comments posted 20yrs
posted by notreally
1 comments posted 20yrs posted by notreally

XilFatFS and CF...

Hi there, I'm experiencing some problems with a 64 MB Compact Flash and xilfatfs on the XUP board: since I wasn't able...
2 comments posted 20yrs
posted by mighty
2 comments posted 20yrs posted by mighty

Help in the platform studio(EDK)

Hi, I am using the platform studio first time.I like to know how i can add my testbenches and remove the microblaze pro...
8 comments posted 20yrs
posted by subin.82
8 comments posted 20yrs posted by subin.82

need help plz.

i need a VHDL code for interface between a pc and FPGA kit (flex10ke) to exchange data. this programme i will use to ma...
1 comments posted 20yrs
posted by EzzEldine
1 comments posted 20yrs posted by EzzEldine

Synplify & Fedora core 5

Dear all, I'm trying to install a FPGA development platform under a Linux Fedora Core 5. The only tool not working is S...
4 comments posted 20yrs
posted by georges
4 comments posted 20yrs posted by georges

Number of bonded IOB's

Hi all, when trying to generate the System ACE file in ISE 7.1 for one of my designs i get the error that no. of bonded...
2 comments posted 20yrs
posted by vidyutg
2 comments posted 20yrs posted by vidyutg

XC3SE available

Hello, its seems that XC3SE is finally available, Digikey carries them and announces them as available. Prices are attr...
0 comments posted 20yrs
posted by bon
0 comments posted 20yrs posted by bon

Webpack ISE 8 and Vertex4 XC4VLX60

The free Xilinix ISE doesn't seem to support Vertex-4 LX60. How shoold Igo about writing a design for it? Thank you
2 comments posted 20yrs
posted by vassili.savinov
2 comments posted 20yrs posted by vassili.savinov