Help in the platform studio(EDK)

Hi, I am using the platform studio first time.I like to know how i can add my testbenches and remove the microblaze processor from the setup. I am trying to generate the controller for my V4MB lx60 board and i want to test the ddr in the board.From the tool(platform studio) i can select the pheripherals and the processor etc but didnt have any idea how can i use this to test my ddr.I tried to generate the hdl code.But all the controllers are ipcores(black box) and i wont be able to synthesize it using xilinx ise(library for these ipcores are missing). regards subin

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subint
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subint

subint schrieb:

EDK supports

1) MicroBlaze 2) PowerPC

if you want to use EDK for any other purpose (eg no supported CPU from the list of supported CPU'S) then this is:

"DO NOT"

thing.

It is possible to use the EDK IP cores outside the EDK system, but it really doesnt make sense in most of cases (read: almost never).

If you want EDK (and EDK supplied IP cores) then use EDK the way it is intended to be used eg to design MB/PPC based SoC

If you want to play around with DDR memory then take some DDR IP core any play with it.

Antti

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Antti

Subin,

You would have to create an IP core that is a either an OPB or PLB bus master. This is not a difficult task. You would first want to understand the IBM CoreConnect buses through the documentation from IBM and Xilinx. The IBM documentation is more complete, but the Xilinx documentation is important as it will enlighten you as to the limitations of the Xilinx implementation of the memory controllers and such.

Antti wrote:

Antti,

As one of the more creative guys in the newsgroup, who likes to experiment a good deal, I would have actually thought you would have been supportive of the notion of using Platform Studio without a processor. The only limitation is that at least one IP core needs to be a bus master, or the system created isn't going to do anything at all.

We have done a number of designs like this, and have found it both very useful and productive. For example, we designed a PCI card that had a bridge between the system's PCI bus and the PLB bus inside the chip. The only master was the outside system communicating over PCI and a DMA engine in the bridge. It went remarkably well. We did create our own bridge by wrapping around the Xilinx PCI logicore. No MicroBlaze or PowerPC anywhere in the design.

On a scale of one to ten, I would rate using the Platform Studio without a processor, and creating an OPB bus master about a three, only because of the complexity of doing a first bus master. The way the question was asked by the original poster, might suggest that this idea might not be a good recomendation for him just yet, as he may want to start with something a little simpler.

So, respectfully, I would have to say, this is definitely a "DO" thing, so long as the implementer has a good understanding of the Platform Studio and the IBM CoreConnect architecture.

Regards, Erik.

--
Erik Widding
President
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Erik Widding

Hi Antti, Do you know from where i get a free DDR IP core.My ddr is MT46V32M16 -6 and the board i am using is a Memec V4 board(DS-BD-V4LX60MB rev-3).And there is daugter card through which i connect the fpga to the 922T ARM core. Thanks in advance regards subin

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subint schrieb:

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takes 2 minutes to find those BTW

Antti

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Antti

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