Field-Programmable Gate Arrays

Xilinx ISE ver 8.2.02i is optimizing away and removing "redundant" logic - help!

Hello All, I am writing a VHDL design for a Xilinx FPGA using ISE ver 8.2.02i (8.2 SP 2) and I'm trying to get post-map...

41 comments posted 19yrs

posted by james7uw

41 comments posted 19yrs posted by james7uw

simplyrisc-s1 free core

Free S1 core with Linux tools (gcc) emu runs on iverilog: http://www.srisc.com/?s1 This is a RISC with 64 bit address a...

10 comments posted 19yrs

posted by pNaonStpealmtje

10 comments posted 19yrs posted by pNaonStpealmtje

FPGA Devices' stability and process parameters

I found the discussion "Why No Process Shrink On Prior FPGA Devices" interesting and would like to add some words regar...

2 comments posted 19yrs

posted by fpgaengineerfrankfurt

2 comments posted 19yrs posted by fpgaengineerfrankfurt

Anyone who have succeeded with BPI configuration on the Spartan-3E Starter Kit

Hi! I've tried to explore the BPI (Byte Peripheral Interface) configuration mode on the Spartan-3E starter kit without...

1 comments posted 19yrs

posted by jorgen.gade

1 comments posted 19yrs posted by jorgen.gade

Can a FPGA work like a microprocessor ?

Hi all, can a FPGA work like a microprocessor ? If yes upto what extent ? Please suggest.

4 comments posted 19yrs

posted by sinu.nayak2001

4 comments posted 19yrs posted by sinu.nayak2001

Negative slack

I am using virtes II pro pci card .The card has a pci bridge with a bus linking processor in the bridge to the fpga. Th...

2 comments posted 19yrs

posted by dhruvakshad

2 comments posted 19yrs posted by dhruvakshad

Virtex4FX12 and Spartan3 lead time

Hi, I need to buy a Virtex4 FX12: XC4FX12-10FFG668C and a Spartan3: XC3S2000-4FGG676C >From Avnet it takes at least 8 w...

7 comments posted 19yrs

posted by francesco.poderico

7 comments posted 19yrs posted by francesco.poderico

microblaze programm doesn't fit into bram...

hi i just started to work with the microblaze processor and ethernet (i hav the digilent spartan3e board) and it seems...

3 comments posted 19yrs

posted by u_stadler

3 comments posted 19yrs posted by u_stadler

Gamma values for LCD modules

Hi folks, How do I calculate the gamma values for LCD module? I am trying to design a LCD driver board. Cheers P

0 comments posted 19yrs

posted by eziggurat

0 comments posted 19yrs posted by eziggurat

NCO & DownConverter routines

Hi, I please you to suggest me how I can find a good performances, free, RF Numerical Controlled Oscillator (or RF downc...

0 comments posted 19yrs

posted by iz5fcy_NOSPAMPLEASE

0 comments posted 19yrs posted by iz5fcy_NOSPAMPLEASE

microblaze startup problem

Hello all, We are trying to design a small microblaze design in a spartan 3 and the problem we have is that the microbl...

7 comments posted 19yrs

posted by t

7 comments posted 19yrs posted by t

Hennessy & Patterson new ed Computer Architecture:A Quantitative Approach

I don't want to spam, but I noticed someone referenced this book as a "must-have" on the comp.arch group I work for the...

0 comments posted 19yrs

posted by merrit_malloy

0 comments posted 19yrs posted by merrit_malloy

ML 310 on board power measurement...

Hi guys, I'm trying to measure power consumption of my system on ML 310 board. I was wondering if any one of you have d...

0 comments posted 19yrs

posted by amirhossein.gholamipour

0 comments posted 19yrs posted by amirhossein.gholamipour

Managing small IP library

Hi everyone, A few months ago, I have started working in a small group which designs FPGAs for video application. By th...

3 comments posted 19yrs

posted by avishorp

3 comments posted 19yrs posted by avishorp

Altera CPLD 7128S heating up

Hi, I work on a board with an Altera 7128S part (5V quite old but still used ...). It seems the part is most of the tim...

6 comments posted 19yrs

posted by jfhasson

6 comments posted 19yrs posted by jfhasson