Field-Programmable Gate Arrays

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xilinx multichannel fir alignment

I'm using the v5.1 coregen fir, decimate by 2, two channel operation to process my I/Q. My system clock is 56 Mhz and t...
3 comments posted 19yrs
posted by cepope
3 comments posted 19yrs posted by cepope

FIFO Full logix - V4

I am working with a dual port RAM FIFO module that has a 32-bit write port and an 8-bit read port using asynchronous cl...
2 comments posted 19yrs
posted by mottoblatto
2 comments posted 19yrs posted by mottoblatto

FPGA for HPC

Dear, I'd like to learn programming FPGAs for HPC applications. I am, however, a newbie in this field. I do have a soft...
1 comments posted 19yrs
posted by bart.deboeck
1 comments posted 19yrs posted by bart.deboeck

watchdog timer: interrupt handler: microblaze

I have been trying to write a watchdog interrupt handler and have not been successful in coming up with a working code....
1 comments posted 19yrs
posted by azizul.islam
1 comments posted 19yrs posted by azizul.islam

FIFO : Synchronous WRITE, Asynchronous READ ?

Dear Using BRAM (for example, RAMB16_S36_S36), I do need to implement "synchronous WRITE, asynchronous READ" FIFO. >Fro...
3 comments posted 19yrs
posted by pasacco
3 comments posted 19yrs posted by pasacco

Running Virtex5 GTP at lower data rate

At power-up, I need to run the Virtex GTP at 400Mbps and then after the initialization, I need to run the V5 GTP at 3.2...
4 comments posted 19yrs
posted by
4 comments posted 19yrs posted by

Xilinx fpgas...

I've been looking at the Spartan 3an's mostly, because of the built-in config flash, but I've yet to settle on them as...
7 comments posted 19yrs
posted by john.m.oyler
7 comments posted 19yrs posted by john.m.oyler

libero.actel. i need a clock in a non global pin.

Is possible force the assignation of a clock to a pin (non global pin)? (=BFcan i do before synthesize?) On synthesis t...
1 comments posted 19yrs
posted by dorama2
1 comments posted 19yrs posted by dorama2

SDRAM vs DDR2 on Spartan3E

Hi all, I am considering to replace a SDRAM with a DDR2 on a custom Spartan3E1200 board to gain some bandwidth in a Mic...
1 comments posted 19yrs
posted by ales.gorkic
1 comments posted 19yrs posted by ales.gorkic

DDR2 vs SDR on Spartan3

Hi to all, I am considering to replace the x16 SDRAM for a x16 DDR2 to gain some bandwidth for a MicroBlaze system. I w...
3 comments posted 19yrs
posted by ales.gorkic
3 comments posted 19yrs posted by ales.gorkic

Using the EDK based video decoder

Hello everybody, I am trying to capture input video data using the Digilent Video Decoder board (VDEC1) connected to th...
0 comments posted 19yrs
posted by koustav79
0 comments posted 19yrs posted by koustav79