Field-Programmable Gate Arrays

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Processor in CPLD

Hi. I would like to hear your opinion on the possibility of implementing a processor in a CPLD? The functionality does...
11 comments posted 18yrs
posted by rgrworking
11 comments posted 18yrs posted by rgrworking

Viterbi Decoder

Hi, I am designing a viterbi decoder with r=1/2 and k=7 on fpga but don't want to design from scratch. Can one share so...
0 comments posted 18yrs
posted by sarah.stregel
0 comments posted 18yrs posted by sarah.stregel

MicroBlaze floating point precision issues

Hello, group. I'm having a heck of a time trying to figure out why my MicroBlaze implementation is presenting *supposed...
6 comments posted 18yrs
posted by the.jd.in.space
6 comments posted 18yrs posted by the.jd.in.space

Xilinx MIG onm Solaris

Hi, I can't locate MIG in coregen on Solaris 9.2 and ip update 2? Is it only on Linux and Windows? /michael
2 comments posted 18yrs
posted by michael_laajanen
2 comments posted 18yrs posted by michael_laajanen

Compilation of Plasma SW under Linux

Hi All, I have previously send this message to comp.arch.embedded, but probably it was "NTG", as it is more associated...
2 comments posted 18yrs
posted by wzab
2 comments posted 18yrs posted by wzab

How to connect a LED with a clock?

Hello All, I am a newbie to FPGA and got recently a new Spartan3E1600 Microblaze development kit. I want very much to s...
10 comments posted 18yrs
posted by vladimir.v.korostelev
10 comments posted 18yrs posted by vladimir.v.korostelev

conversion problem

function int_to_float (x: signed) return signed I wish to convert the input signed vector to Single precision 32 bit fl...
4 comments posted 18yrs
posted by FPGA.unknown
4 comments posted 18yrs posted by FPGA.unknown

Spartan 3E Sarter Kit Ethernet

Hello. Would you please to get me some information about how can i realize UDP transmition with Spartan 3E Starter Kit?...
6 comments posted 18yrs
posted by Pavel.Schukin
6 comments posted 18yrs posted by Pavel.Schukin

integer to binary conversion

I am converting an integer to a single precision floating point number. I understand that floating point number compris...
3 comments posted 18yrs
posted by FPGA.unknown
3 comments posted 18yrs posted by FPGA.unknown

about "tri-states data bus" problem Ñ¡Ïî

my module is as follows: entity tri_state_bus is Port ( data : inout STD_LOGIC_VECTOR (15 downto 0); cs : in STD_LOGIC;...
1 comments posted 18yrs
posted by huasong.fang
1 comments posted 18yrs posted by huasong.fang

MPMC On EDK

Hi All , I am trying to interface microblaze with a Micron DDR SDRAM (MT46V16M16FG-75 16Mx16) using MPMC from the IP ca...
4 comments posted 18yrs
posted by niladri1979
4 comments posted 18yrs posted by niladri1979

Cyclone II short-circuit failure mode

A EP2C5Q208C8 in one of our boards has gone short circuit on the 3v3 supply. We manufacture this board in quantities wi...
3 comments posted 18yrs
posted by edaudio2000
3 comments posted 18yrs posted by edaudio2000

DDR SDRAM demo for Spartan-3E starter kit?

I have a Xilinx/Digilent Spartan-3E starter kit Rev D (with 46V32M16 -6T F). Is there any *simple* demo that stores a p...
10 comments posted 18yrs
posted by posedge52
10 comments posted 18yrs posted by posedge52

rbt to C array

Hi all ! For those who want to download bitstream to Xilinx FPGA via a microcontroller, i have been writing a small per...
1 comments posted 18yrs
posted by habib
1 comments posted 18yrs posted by habib