Field-Programmable Gate Arrays

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bare-metal ZYNQ

Assume I'm a pointy-haired boss trying to help one of my guys. I think that... The Xilinx ZYNQ (FPGA+ARM on a chip) has...
23 comments posted 7yrs
posted by jjlarkin
23 comments posted 7yrs posted by jjlarkin

Nallatech BenBlue-II software

Hello folks, I try to use an old FPGA card from Nallatech, it is a BenNuey PCI card. I have the FUSE software, but I am...
0 comments posted 7yrs
posted by terafemto
0 comments posted 7yrs posted by terafemto

Problem in ADV7611 with Interlace Input

Hello folks, We are developing demo Aplication for HDMI input and output. for this we are using PicoZed 7030 board with...
1 comments posted 7yrs
posted by swapnilpatil27497
1 comments posted 7yrs posted by swapnilpatil27497

FIFO timing, the right way

Hi all, I am working on a block that needs to accumulate (at least) K data items and then consume them in a burst, whil...
4 comments posted 7yrs
posted by peter.pan
4 comments posted 7yrs posted by peter.pan

Up/Down Binary Counter with Dynamic Count-to Flag

hello, i need to solve this problem in verilog:Up/Down Binary Counter with Dynamic Count-to Flag this is start cod: mod...
2 comments posted 7yrs
posted by buse.victorstefan
2 comments posted 7yrs posted by buse.victorstefan

FPGA board on ebay

If anyone is interested I just got round to putting up a nexys Video artix-7 board on ebay. This is a private not trade...
0 comments posted 7yrs
posted by john
0 comments posted 7yrs posted by john

BITSLIP STATE MACHINE

Hi, I am trying to design a state machine for bitslip function but simulations dont seem to be correct. I cant figure o...
0 comments posted 7yrs
posted by atifnawaz08
0 comments posted 7yrs posted by atifnawaz08

Replaceme EPROM by CPLD/FPGA

We have a product that includes a small parallel OTP memory. These devices get very hard to get and no easy alternative...
32 comments posted 7yrs
posted by stef33d
32 comments posted 7yrs posted by stef33d

TCS34725 Basys3 VHDL

Hi I am trying to use TCS34725 to identify Green and Red Colors, it has I2C interface and i could not find any I2C inte...
1 comments posted 7yrs
posted by utkudenizal
1 comments posted 7yrs posted by utkudenizal

High-level synthesis

It's been about 3 years since I've done any *serious* FPGA work. I used mostly VHDL or sometimes my own Matlab scripts...
27 comments posted 7yrs
posted by benjamin.couillard
27 comments posted 7yrs posted by benjamin.couillard

Xilinx M1 Pad file

Is there anyone that has a description of the Xilinx M1 Pad file syntax? An example file would do as well. Best Regards...
0 comments posted 7yrs
posted by aprichelieu
0 comments posted 7yrs posted by aprichelieu

Tiny CPUs for Slow Logic

Most of us have implemented small processors for logic operations that don' t need to happen at high speed. Simple CPUs...
72 comments posted 7yrs
posted by gnuarm.deletethisbit
72 comments posted 7yrs posted by gnuarm.deletethisbit

Color sensor with BASYS3 VHDL

Hi, I need to make a circuit which does the following thing: When it sees a red object it will send output 0 until it s...
1 comments posted 7yrs
posted by utkudenizal
1 comments posted 7yrs posted by utkudenizal

Anyone have files from the old Xilinx FTP?

Hi all, Looking for someone who has FTP files from 1997 for the XACT Foundation v6.0.2 update. Web Archive has the file...
5 comments posted 7yrs
posted by timbuck2
5 comments posted 7yrs posted by timbuck2