Xilinx Virtex 4

Andreas,

V4 has the ICAP (internal configuration access port) that has been in since Virtex II.

V4 also has some other reconfiguration features, but those will have to wait until characterization is complete to be disclosed.

Aust> Hi,

Approximately when do you expect that we will be able to read the sort of technical detail that appeals to this newsgroup?

After the summer holidays? Early next year? Late next year?

Would Halloween be appropriate?

Well, it was an innocent inquiry. And AL will pass if he can't say anything.

As soon as one speaks to an FAE the whole sales thing starts. Sometimes product planning has to be approached by searching for an intersection between the customers' unlimited wants and the technology which is available at the price point. Browsing the data is the first step, long before a posssible order is on the radar.

Let me calm down the waves: There was a press release that we have Vitex-4 parts. So you can be sure that we are very busy testing and verifying the design, functionality and performance. We know these parts inside and out, but we are not gonna tell.

Formal public announcement of technical details and availability is being orchestrated by Marketing. There are many aspects: Too early, and you designers complain about lack of availability. Too late, and we lose a design-in window and thus share of market. The technical press needs some lead-time, and we have to prepare, revise, polish and distribute many hundreds of pages of technical documentation. (I am involved in that). The official release will be a big event, and nobody should underestimate the amount of coordinated effort, and the need for keeping the details under wraps until then. Don't forget that there is at least one competitor just waiting to exploit the smallest of missteps. We don't want to give him any ammunition. But we also want to keep the user community excited and happy. So, we will release the information "when the time is right". Stay tuned! Peter Alfke