Xilinx Synchronous FIFOs

Jan 11, 2007 1 Replies

Hello,



I have been looking at my FIFO designs and considering if they are backward compatible from Virtex4 to Spartan.



I have been using the FWFT First_Word_Fall_Through feature on the Virtex4 and when I compared waveforms of this with those from a CoreGen FIFO got different results. I am still using ISE 7.1.04 and the CoreGen models were Version 5.



I did not see any FWFT switches on my CoreGen wizard. Are there any FWFT features in ISE 8.2?



Also it seemed that without the FWFT feature, the Virtex4 FIFO required 4 clock cycles from the wr_en to the rd_en signals, while the CoreGen and the Virtex4 FIFO with FWFT on requires only 3.



Brad Smallridge brad at AiVision dot com


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