Xilinx ML403 Board Beginner

Hello Group,

I just received the Xilinx ML403 development kit. Wow what a board ! I especially like the high speed SMA(?) connectors. Looks like gold plating.

I have downloaded the 7.1.04 service pack and the newest IP. I also went through all the click-through demos that come on the Compact Flash. Very nice.

The Quick Start guide then just kind of drops off. Where does a starter go from here? I would like to try my VGA test patterns, from a previous job, on the new platform, especially considering the post in this group about the quality of the VGA signals.

But where are the hooks to download a VHDL ISE project onto this new device? Do I do it from XPS or from the ISE ? I would like to get some hardware downloaded onto the fabric before I start learning about the busses, addressing, and such, of the software side of this thing. ISE 7.1.04 doesn't show me Virtex 4 parts.

Any information to the group about your early experience with the ML40x line might be of great use to me and the rest of the readers.

Thank you,

Brad Smallridge a i v i s i o n . c o m

Reply to
Brad Smallridge
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Brad wrote: "I especially like the high speed SMA(?) connectors. Looks like gold plating. "

Yes, they are SMA, and the plating is "pure 24 carat gold, several thousand nanometers thick" as they might say in marketing, using in-terminolgy... Peter

Reply to
Peter Alfke

There is a reference EDK project that drives the VGA port at

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. XAPP717 written for the ML403 has a pretty cool demo too.

Reply to
Kunal

This link goes to the general ml403 site. I guess you are refering to the ML403 Video Demonstration Design of which, for a beginner, I have several issues. One it say that there are documentation files and source files. There is an MS word DOC file that describes driving a VGA through horizontal and vertical filters from a source thats is stored in a BMP files and somehow converted to bit stream, I guess.

As for source files, I don't see anything recognizable. There are some ucf files, I didn't look to see why the three board varieties are different, and .m files and a .mdl fil, don't know what these are.

I have VHDL code ready to go developed on a Spartan 3. I don't need FIR filters to get started, Xilinx System Generator, or other stuff. Is there something else you can point me to? Is this where you got started?

Brad Smallridge

Reply to
Brad Smallridge

Very interesting!! 24 K Gold plating, how about brittleness and the associated reliability?

`onm

Reply to
onenanometer

Hi Brad, I re-read you earlier post and could not figure out if you want help with EDK/ISE in general or the driving the VGA port in particular.

For now I will assume the latter and explain: XAPP717 has a XPS project under xapp717\hw\apu_idct\. Don't worry about the IDCT portion of it. To drive the VGA port you neeed the plb_tft_cntrl_ref_0 pcore and associated driver which is xapp717/sw/standalone/apu_idct/src/bootload_basicgraphics.* . If you look under bootload_basicgraphics.c, you'll lots of useful function like XTft_DrawLine etc.

My 2 cents on how the plb_tft_cntrl_ref_0 works: A portion of the DDR memory is placed aside for the video memory. The powerPC writes to this area to draw on the VGA port. The pcore(plb_tft_cntrl_ref_0) is a master on the PLB bus and grabs the data out of the video memory and buffers it using a single BRAM primitive. It then drives the VGA port in a 640x480 config only. The DCR is used to set the start address of the video memory in the pcore (so it knows wher to grab it from), but you can remove the DCR and specify the start address as a parameter in the MHS file.

Hope this helps. If not, tell me exactly what you want to know about.

Kunal

Reply to
Kunal

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