Since I am the oldest Xilinx veteran here ( Jan 88), I can answer with authority:
The first part, in 85, was the 2064 (named after the number of CLBs in the matrix), followed soon by the 2018, named after the (contentious forever) number of gate equivalents. The 3000 series was introduced in the following sequence (sorry Austin, I was there):
3020 in late 87, 3090 was the second (!) in mid 88. 3042 came soon after and becamemost popular, then (early 89?) the 3062 as the last-born and forever least popular. The 0riginal 3090 die was exactly 100 square-millimeters, but it was not 10x10 since we wanted to fit two masks into the biggest possible square reticle, so it was something like 12.5 x 8 mm, and we proudly depicted it (to scale) on the back of the data book. Xilinx has, forever since, always pushed manufacturing to offer the biggest possible top-end device, because we know that there are designers salivating for something even bigger, and the unavoidably high price is grudgingly accepted when there is no alternative.
Process shrinks were done more quietly in those days, since they did not affect the user with a change in supply voltage. Those were the 5-V days, when everybody used the same Vcc :-)
3000A was a functional superset, and 3100 offered higher speed through "pumped gates", internally generating a higher Vcc for certain circuit detailss. Also a new top-end, the 3195. I wrote a candid comparison of the various 3000 families and published it at the front of the family datasheet, with an innovative
3-dimensional picture... See:
Peter Alfke, Xilinx Applications