To those that are familiar with this board, I need about 50 or so digital io lines with a max bit rate of about 1Mb per second. I was considering using the PCI slot, but since I don't really want to build a full PCI compliant board, I was wondering whether if it is possible to comfigure as I want? Secondly are the data and address line directly connected to the FPGA, it seem to appear so the the block diagram but there seems to be a lot of passive components around the slots.
- posted
19 years ago
-- Wing Wong. Webpage: http://wing.ucc.asn.au