Hi All,
I am new to FPGAs and my main interest is implementation of some signal processing algorithms on FPGAs. For testing the MEMEC (DS-BD- V2MB1000) board which has a xc2vc1000 fpga on it along with a xc18v04, I was trying to write a simple module. I am using the impact Parallel IV cable for download of my code.
I started with a simple VHDL code for a counter to be displayed on 7- segment display. Since it did not work, I slowly started removing code and now I have a single line in the architecture
architecture board of testLed is begin led