Xilinx dedicated multiers vs multipliers in slice fabric

Hello folks,

Found a load of archived posts on this topic.

I was wondering what the current thoughts are on what is ultimately faster:

(a) dedicated 18x18 multipliers (b) 18x18 pipelined multiplier in slice logic

Also, are there any advantages/disadvantages you can think of between the two options other than the following:

(1) If all dedicated multipliers are used, you have no choice but to use slice logic

(2) Power considerations?

Thanks for your time,

Ken

Reply to
Ken
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3: Use of the BlockRAMs. Since the BlockRAMs and multipliers share interconnect, there are limits on when they can be used simultaneously. 4: Pipelined, throughput-optimized performance. The fixed multipliers are unpipelined or single-stage, a LUT multiplier can be much more finely pipelined (higher thorughput).
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Nicholas C. Weaver                                 nweaver@cs.berkeley.edu
Reply to
Nicholas C. Weaver

Ok - it is my understanding that there are registers just before and just after the dedicated multipliers that can be used to speed them up.

But what you are saying is that the LUT multipliers will have a higher max MHz when both solutions are as pipelined as they can be?

Thanks for your time,

Ken

Reply to
Ken

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--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com
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Reply to
Ray Andraka

Great answer Ray - thanks very much.

Ken

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Reply to
Ken

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