Hi,
I was poking around in FPGA Editor, and I found a switch I hadn't noticed before. There's an Virtex2Pro-specific option to disable the PowerPC cores and "recover" the FPGA fabric that they overlay.
Yay! No more PPC cores getting in the way of my floorplan and RPMs.
Question: is there a command line option (on Map or PAR) for this so that I don't have to use FPGA Editor?
Cheers, Allan.
Allan,
Does that switch do anyth> Hi,
--
--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com"They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759
Sure Ray, something happens in the real FPGA, but only on April 1.
Cheers, Allan.
--
--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com"They that give up essential liberty to obtain a little temporary safety deserve neither liberty nor safety." -Benjamin Franklin, 1759
Have something to add? Share your thoughts — no account required.
Ask the community — no account required