Hi out there; I'm generating 49.152 MHz from 40MHz osc using 2 DCMs first does 24/25 & second does 32/25.
This generally works, but sometimes doesn't!
I've not used the DCMs' clkfb input as only one clock is used in the whole FPGA, the 49.152. The clkfb of both is tied to gnd.
Should I feed the DCM 1 o/p back to its clkfb & similarly for DCM 2, or what exactly? Will this give better functionality?
Any commentsd please
TIA Niv.
You might be able to generate something close enough in a single DCM. What is more important to your application, a precise frequency or minimum jitter? How accurate do you need the 49.152 MHz clock? In general, using the CLKFX from the first DCM cascaded to the second DCM is not recommended, due to the amount of output jitter from the first DCM.
Here are a few examples.
(M/D)=16/13 generates 49.23077 MHz, a 0.160% difference. Peak-to-peak jitter 1.14 ns.
(M/D)=27/22 generates 49.09091 MHz, a -0.124% difference. Peak-to-peak jitter 1.43 ns.
(M/D)=11/9 generates 48.88889 MHz, a -0.535% difference. Peak-to-peak jitter 1.02 ns.
If you use the DCM's CLK0 output as feedback, then the CLKFX output and the input clock are phase aligned every M*D clock cycles.
See also page 54 and on in XAPP462
--------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. General Products Division Spartan-3/II/IIE FPGAs
--------------------------------- Spartan-3: Make it Your ASIC
Yes, DCM1 lock output is used as the reset for DCM2 (inverted,a s it needs to be).
I need accurate frequency, I'm using a 2 ppm osc as source and need to maintain that. I shall try connecting the clk0 back to clkfb, Thanks.
The final choice is to get an accurate osc at the needed freq!
What
recommended,
the
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Why stop there :) You could check the error, and run some local heating on the die (gated ring oscillators?), to correct the wander. Get a TXCO inside the FPGA... ( or some apps may allow a calibrate/send phase alternate )
-jg
Hi I've the some problem. In my project the hardware clock connect to DCM was incorrect generate. It think the skew on input clock was bad.
1) Try redesign clock generator for this board. 2) use atrribute for DCM LOCK it give you stable clock. But if you have input clock with too much skew the Lock couldn't be set. The output clock isn't be generate in this case. WZ U¿ytkownik "Niv" napisa³ w wiadomo¶ci news:V3%1d.124$ snipped-for-privacy@newsfe2-win.ntli.net...To answer your multiple posting, I'm using a TCXO from CMAC, they do them down to about 0.5 ppm.
Niv.
unsolicited
addresses.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Message-ID: Date: Wed, 15 Sep 2004 20:51:16 -0500 Lines: 23 NNTP-Posting-Host: 64.139.1.69 X-Trace: sv3-6fY7wjg9jSaMcJho07ndbq2t2wWJQcyiw4yhtRUi6ulH5Abmi8hesNpQdL6aKqDjmELZmcVXbvNmovR!K81+soA3P4Xo9qlh9kYOaRRmdaSqfyptBTXJCrwUZrAcmNPwMMI2zoY5yWigWJzIjsJFxXgdMdA= X-Complaints-To: snipped-for-privacy@megapath.net X-DMCA-Complaints-To: snipped-for-privacy@megapath.net X-Abuse-and-DMCA-Info: Please be sure to forward a copy of ALL headers X-Abuse-and-DMCA-Info: Otherwise we will be unable to process your complaint properly X-Postfilter: 1.3.13
That's an interesting spec. What sort of crystal/box are you using to get that level of stability? How expensive?
That got me thinking... Many applications that need good accuracy also need low jitter. DLL type designs have lots of jitter. (For some value of "lots".)
Is it interesting to use something like a DLL in an unlocked mode? That is, run a calibration phase then lock it at the best tap.
The idea is to kill the tap-changing jitter in trade for timing wander as temperature or Vcc changes while still getting most of the timing fixup from the DLL calibration step.
Hi Hal, You can sort of do this by stopping the CLKIN, but there are limits for how long. Check CAF passim. You can probably stop it long enough to do some experiments! Unfortunately, I don't think this is gonna work very well. Noise on Vccaux will affect the delay elements in the DCM, and your frequency resolution/accuracy is going to be crap if you can only have one tap selection. Cheers, Syms.
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