Hello all,
I use Xilinx Foundation 1.5 and VHDL for a SPARTAN XCS-10 . I have to use the JTAG-Pins as I/O-pins (TDI, TCK, TMS = I/O, TDO=O). How to do? The data-sheet give me not enough information...
Thanks
Frank snipped-for-privacy@snafu.de
Hello all,
I use Xilinx Foundation 1.5 and VHDL for a SPARTAN XCS-10 . I have to use the JTAG-Pins as I/O-pins (TDI, TCK, TMS = I/O, TDO=O). How to do? The data-sheet give me not enough information...
Thanks
Frank snipped-for-privacy@snafu.de
A good starting place would be the following Xilinx Answer Record.
How do I instantiate JTAG pins (TDI, TDO, TCK, TMS) in HDL as general I/O?
--------------------------------- Steven K. Knapp Applications Manager, Xilinx Inc. Spartan-3/II/IIE FPGAs
--------------------------------- Spartan-3: Make it Your ASIC
Look in the Libraries guide. I believe you will find some special I/O pad symbols with appropriate names.
Note that these I/O pins do not have a full IOB behind them, so no input or output flip flops.
I seem to remember that you can only use IBUF and OBUF for these pins. (maybe OBUFT too)
Philip
Philip Freidin Fliptronics
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