Which Environment for Xilinx Design?

Hello,

I'm supposed to set up a new VHDL/FPGA lab at our university. But I'm unsure which operation system and programming solution to use. Maybe some of you have experience setting up a lab and can answer some questions.

We already have the Xilinx ISE Software 6.1i for PC/Solaris/Linux and Synopsys Software for Solaris and Linux through a Europractice license. We also have an "old" DLC4 and XC4005, but I guess it's not worth trying to make that work. (As far as I could find out, DLC4 is not supported anymore even for ISE 4.2.)

So here are my questions:

  1. Which operating system supplies the best performance/environment for Xilinx development? I read that the supplied ModelSim II XE works only on PCs, not on Solaris or Linux. So would you prefer a PC, because of the included simulation environment?

  1. If a Solaris/Linux environment is concerned, which simulator is available/usable? Is Synopsys' scirocco usable?

  2. Which Download Cable would you recommend? Does the Parallel Cable only work with a PC (I read that somewhere)? Or would you prefer the Multilinx Cable? (If so, why?)

  1. Regarding the programming of the FPGA, would you recommend a separate design/program environment (e.g. Some Solaris Workstations for design, and one PC just for programming and testing on a FPGA)?

I hope someone can enlighten me a bit!

Regards,

Marcus

Reply to
Marcus Schaemann
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I tutor and do some lab support . We are just upgrading from windows nt4 to windows xp.

What os depends on what hardware you have and what software is supported and what licenses you get for free.

Also if students can get themselves copies of the software for use on their own machines.

That is why we use xilinx webpack on windows for students and full ise version in the labs(xilinx university program).

We are still using version 5 as haven't received 6 yet, doesn't make much difference as most students don't use fpgas. (Xilinx seems rather slow sending things to non-US uni's, unless its due to the local distributor who is still annoyed at us for buying cplds direct from xilinx due to them being a good bit cheaper ).

For introductory digital systems we are still using schematic entry.

For advanced digital systems vhdl.

Linux version of the webpack isn't out so this isn't an option for the labs yet.

P3 1GHz (256MB ram min) and below windows 2000 or linux P3 1GHz 256MB ram and above windows 2000, windows xp or linux

Which os depends on the software you can get for that os and how easy it is for students to use.

Students buy a kit from the uni, then assemble it. Has experimenter and programmer boards and all components. Programmer board connects to a pc via parallel port and programs both cplds and pic microprocessors on the experimenter board. Using a pic12F675 as a programmable oscillator for the cpld.

This way the uni doesn't need to look after the hardware and each student has their own.

Gives more chance for hands on debugging.

You can put additional boxed programmer boards in the lab but we are removing them as they usually get damaged. (Get some idiot who thinks if the lab programmers or computers don't work they can get an extension on their assignment, so actively disables the lab thats why video surveillance is going in).

Which download cable ? Which ever you have.Or get one of the students or support staff to design a programmer and get the pcbs made.

We may possibly switch to altera as a couple of the lecturers prefer the quartus software with inbuilt simulation.

Also looks like some time in the next year or so Advanced digital systems will switch to fpgas. So we are going to have to come up with a decent student proof fpga design.

Thinking about using dip modules for fpga and cplds on the experimenter board, that way we can still have a common board design for both subjects. Current programmer board can already program fpgas. Also want to switch to a usb based programmer due to the fast disappearing parallel port situation.

Alex Gibson

Reply to
Alex Gibson

Maybe you need 1024MB RAM if you are doing designs with xc2v6000 and above. My experience is, the memory surge to 450MB once P&R started.

Kelvin

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Reply to
kelvin8157

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