Virtex4 Output Pins during Configuration

Nemesis,

How is the HSWAP_EN pin connected? This enables/disables the internal weak pullups while configuring.

If the weak pullup is not enabled, then the pin is tristate while powering ON.

Table 1.1, note 2 page 14; and Table 1.2 page 15.

In any case, the IO pins always have their intrinsic diodes internally:

gnd-------->|--------IO pin------>|------Vcco

So, the pin voltage can not be much less than ground, and not much more than Vcco, as then these diodes are forward biased, and the pin is clamped +/- diode drop from ground (for negative voltages) and Vcco (for voltages greater than Vcco).

Since you seem to have the problem that the pin is going high while configuring, it is not anything to do with the diodes.

A pulldown resistor, once the IOs are set to be tristate while configuring, is the probably answer. The IO pin leakage worst case is

10uA, so if there is no other leakage, the pulldown could be something like 10K or 100K ohms, and be sufficient.

Even a very weak LVCMOS IO standard should be able to pull up 10K to the Vcco rail.

Austin

I don't know, the FPGA is mounted on a mezzanine card (GE Fanuc, ICS8550) ... and I don't have schematics of this board.

Unfortunately the mezzanine is mounted on a carrier board with some LVCMOS bufffers, I'm not sure I can add pulldown resistors.

I think this is going to be a tough problem.

Nemesis,

OK, let us assume the weak pullups are enabled.

How strong are they?

Table 3 states 200 uA to 3.3 V (check for your Vcco)

So, to pull that down to 0.3 volts, ie drop 3 volts, you need 3/200uA =

3/2 E4 ohms, or 15K (check my math).

Austin