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Quartus v7.x fitting bug

Hello,

Just trying this group as a bit of a last resort. I am currently working on a design that has identified a bug in Quartus v7.x (I have tried all versions up to 7.2sp3) on a Cyclone based design.

Naturally I was at first very skeptical that the bug was with Quartus, but after extensive use of signal probe I can see that a shift register is injecting spurious data. The design isn't particularly fast and is in one clock domain. What is very strange is that the back annotated simulation also exhibits the same bug - so I am sure the problem is with the fitting - not a signal integrity issue with our board. Looking at the technology map viewer, the LE elements appear to be as you would expect for a shift register.

We went through some time with mysupport, and Altera finally accepted that it was a bug. But since then dialog has broken down, we have heard basically nothing from them about a fix or when it might be available. Our distributor has also been in direct contact with the Altera UK & Ireland Channel Manager - but that has also been unsuccessful.

The support request was opened on the 14 Feb, and the last we heard any feedback was on the 18th March which is 2.5 months ago (seems pretty poor if you ask me).

I am not sure what avenue to try next, but hopefully there is someone reading this at Altera that could get in touch with the possibility of investigating this problem.

Kind regards, Ian Barnes.

Reply to
ian.barnes
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  1. Make sure that your one clock got assigned to a global clock line. When a clock is routed through the fabric, even for a short excursion, hold violations will occur and shifters don't always shift right. What is the worst slack time on your STA report? Make sure to use the newer of two static timers. Any odd or complicated constraints? Are all paths being covered?
  2. Double check your design rules. Are all processes synchronous using a standard template? Is the reset pulse synchronized to the clock on deassertion? Any odd IP or generated code or netlists?
  3. Check your functional sims for coverage and add some edge cases.
  4. Zero in on the problem area by slicing out pieces of the design. Make a simple entity that demonstrates the problem.
  5. Find out who your local FAE is and call him every day.

Good luck.

-- Mike Treseler

Reply to
Mike Treseler

  1. Keep pestering on mySupport for an update on when a fix or work around will be available.
  2. As Mike suggested, keep pestering the local FAE to get a fix or work around.

  1. If the problem can be described fairly easily without getting into all the nuances of your entire design, then post your code, the problem description and maybe someone here can come up with a work around.

Good luck

Kevin Jennings.

Reply to
KJ

Repeat using brand X-ise and look at those warnings. Tell your brand A-FAE about your ISE experiments ;)

Reply to
Mike Treseler

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