VCD file generation

If you have a license that allows Verilog + VHDL co-simulation, you can add this to a Verilog module somewhere:

initial begin $dumpfile("myfile.vcd"); $dumpvars(1, mytopinstancename ); $dumpon; end

Regards, Allan.

After "vsim" command use following commands to create a VCD file vcd file file_name.vcd vcd add -r * run -all

"vcd file" command creates a vcd file and "vcd add -r *" logs all signals in the design. Refer Modelsim manual for further description and examples.

-Vikram

I don't know for Modelsim 5.6, but in 5.7: open Modelsim, do "Help" -> "SE PDF Documentation" -> "Command Reference", and look in the index under "VCD Files". There are multiple commands that can be used from a TCL script or the Modelsim command line to create VCD files and add signals to them.

HI, Thanks to all who gave a response. Actually i need the VCD file for power calculation. So, please tell me whther i have to simulate with the correct data(clk frequnecy depends on the max.frequency allowed) or not for generating VCD file.

Your estimate is likely to be no better than what you give the tool to work with. Xpower will give an estimate based on activity rates you provide--either default, or manually, or via vcd. Your simulation should reflect what you would want to measure.

Jason