Hi, has anybody tried using co-sim for Handel C with modelsim? I managed to set up the co-sim environment, and got the handel C code to work with my EDK generated microblaze environment (in VHDL). In short, I am using handel C to build a peripheral which i attached to microblaze via the FSL bus. The simulation works ok when I used Handel-C + VHDL using the cosim manager provided by PDK. However, when I used Handel C DK to generate the VHDL equivalent of the original handel C design, and then re- simulate, the results are now different. The data results which i get from the re-generated core in VHDL is different from the one which I get when i use PDK's co-sim manager to interface between microblaze (in VHDL) + the peripheral (in Handel- C).
Question: who to trust? should I trust co-sim or should I trust the VHDL simulator (modelsim)?
any takers on this?
:) Chris