About partial reconfiguration in Virtex 4

Hi all, It seems that run-time reconfigurations are only available in DCM and RocketIO blocks. Concerning about partial reconfiguration, can every functional block be partially reconfiged? thanks

Reply to
Perry
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Perry,

Only those blocks that have a dynamic reconfiguration port (DRP) interface.

We standardized on the DRP so that any block that wanted to provide the feature should follow the same interface (a bit like creating an internal bus architecture for blocks that need reconfiguration).

At this time, the DCM, the MGT, and the System Monitor all have DRP. There may be more, but you may go to the user's guide, and look at each block (PPC, EMAC, PCIe, etc.) to see if they use DRP, or if they have a set of registers that are part of the fabric access (or both).

Austin

Perry wrote:

Reply to
Austin Lesea

Hi Perry, Partial Configuration through ICAP can be used to dynamically reconfigure any functional block.

You may find this link helpful:

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Basically the Xilinx PlanAhead tool has been enhanced to better support partial reconfiguration flows.

For added convenience we have included a DRP on the System Monitor (V5), and CMT/MGT (V4 and V5) blocks as Austin mentioned. The DRP allows faster access to a limitted set of bits at normal fabric clock speeds - ICAP allows R/W access to all bits - but is slower (configuration clock frequencies).

Which one you use depends on your application.

- Vic

Aust> Perry,

Reply to
Vic Vadi

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