Hello,
I'm using ISE 8.1 and I'm facing problems to synthesize my VHDL project. This project was simulated in modsim without problems. The synthesis process is on-going for several minutes. I would like to know which kind of problem in my project could cause such behavior? Thank you in advance, Fabio
Hard to say. You haven't given us much. Some of my sims run overnight. Have you given it enough time?
Well, I has been running for 40 minutos. However, I don' t have any idea how long is "enought time". I thought it was a problem in my code.
Thank you, Fabio
Brad Smallridge wrote:
Hmm. I misread your post. It could be hung. What part are you running? BRad Smallridge
What is the code that you are trying to run?? May be some one can help you if you can post the code snippet that you are trying to run.
-- Parag
Hello,
I forgot to mention that I'm using the ISE webpack. I wonder if the webpack has some kind of delay in the synthesis step comparing with the ISE Foundation.
Fabio
No. The only difference between WebPACK and Foundation is device support. If XST is taking too long, feel free to submit a webcase and we'll take a look at it.
Steve
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