I would like some suggestions on interfacing the Xilinx Spartan3 device with a DDR SDRAM. The idea is to build a controller that will set up the DDR-SDRAM so that I can do a burst read of a page of data into a block of internal SRAM (dual port).
Your help is appreciated
Xilinx has several design examples on their web site.
A google search turns up a few more on various sites.
You do know about burst length limitations with DDR devices? You can't burst a full page.
G.
STW or at least Xilinx's website.
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