I am looking for a program / a website / or anything that would allow me to verify Reed Solomon code that my FPGA generates. Any help will be greatly appreciated.
Regards, Wojciech Toczynski
Reed Solomon generation / verification
Oct 28, 2005
1 Replies
Xilinx has IP that you could evaluate (yes, it costs $, but I believe there is a free evaluation license which should be available.)
We have used it in the past. (Both evaluation and $ license.)
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