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- Posted on
August 10, 2003, 3:55 am
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Re: Xilinx virtex II DCM CLKFX output not working
achieved. My reset sequencing module takes this into account and holds the
rest of the FPGA in reset until all DCM's are up and running. It resets the
DCM's, waits for a period of time and then samples for a lock condition. If
no lock was achieved the sequence repeats (reset, look for lock).
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