Pullups and pulldowns in EDK?

Anyone know if there is any way to add pullups or pulldowns to IOBs in EDK other than via the UCF? My colleague is currently adding them using the UCF, but they then do not appear my RTL simulation of the board with other FPGAs, and the behaviour in simulation is not then correct.

Many Thanks for any help,

Ken Morrow

Reply to
kenm
Loading thread data ...

kenm schrieb:

add wrapper around system.vhd and add PULLUP PULLDOWN prims there dont think there is any other way

antti

Reply to
Antti

Many Thanks Antti,

I have now added a wrapper to achieve what I needed. Pity there is not a tidier way. A box in EDK, per pad, to select PULLUP, PULLDOWN, KEEPER or NONE would be nice.

Cheers,

Ken

Reply to
kenm

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.