Anyone know if there is any way to add pullups or pulldowns to IOBs in EDK other than via the UCF? My colleague is currently adding them using the UCF, but they then do not appear my RTL simulation of the board with other FPGAs, and the behaviour in simulation is not then correct.
Many Thanks for any help,
Ken Morrow
kenm schrieb:
add wrapper around system.vhd and add PULLUP PULLDOWN prims there dont think there is any other way
antti
Many Thanks Antti,
I have now added a wrapper to achieve what I needed. Pity there is not a tidier way. A box in EDK, per pad, to select PULLUP, PULLDOWN, KEEPER or NONE would be nice.
Cheers,
Ken
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