PCI Express - Root Complex ?

I would guess it's more or less like PCI and you need someone to enumerate the busses and assign address.

Sylvain

Hi Jerome, Sylvan,

Looking at your architecture requirements, I would say that your need is to design an endpoint solution. Here is a link that would perhaps help you see where an endpoint solution sits in the model PCI Express system architecture. http://www/products/ip/images/pci_express_fig1_typ_app.pdf

Going a little bit further, Altera devices (and I think Xilinx is the same) are capable of doing both root complex as well as end point applications. Altera offers a complete portfolio of solutions for PCI Express applications, some highlights as it pertains to Stratix II GX are given below: End point IP Core (x1, x4, x8) with proven interoperability at the PCI SIG (e.g. x8 IP core: http://www/products/ip/iup/pci-express/m-alt-pcie8.html) FPGA (Stratix II GX) with embedded transceivers that are shipping today Stratix II GX based PCI Express development kit orderable today (http://www/products/devkits/altera/kit-pciexpress_s2gx.html)

Besides Stratix II GX, Altera supports PCI Express on Cyclone II, Stratix II as well as Stratix GX. Here is a link that would provide you with an overall idea of Altera PCI Express solutions:

Please feel free to contact me if you have any questions ( snipped-for-privacy@altera.com)

Regards, Aashish

Sylva> > Looking to use some Xilinx V4FX or Altera Stratix GXparts for designing

Hey Guys,

Just realized, that the links specified below need to be modified. Here are the correct links: PCI Express Architecture:

x8 IP core:

Altera Stratix II GX based PCI Express Development Kit:

Overall Altera PCI Express soluti> Hi Jerome, Sylvan,