Can somone work on the pci express project?

I worked on a project not too long ago that involved a PCI (not PCI express) core in a Xilinx. I got to look over the shoulder of the guy making it all work. We had purchased a PCI core from Xilinx, but he had developed PCI cores in the past so he was a real expert.

It was _not_ a trivial project.

The PCI spec covers a lot of ground.

Taking care of all the corner cases takes a lot of work.

Even putting everything into the FPGA to provide the proper care and feeding for the PCI core in such a way that the bus could provide the speed that we needed wasn't trivial.

In my opinion hand-building a PCI core would be like hand building a car

-- it's possible, but it's not worth the time.

The only exception would be if you could be absolutely sure that your project is only going to use a specific subset of the spec, and that you are free to violate unused parts. I wouldn't touch this with a 10 foot pole, and there are very few folks that I would trust to "trim" such a complex spec.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Hi Tim,

I will second your opinion about PCI bus. My company Brace Design Solutions did the "like hand building a car," and developed a PCI IP core from scratch. And I agree with you that it was not a trivial project. The project itself was further complicated by the fact that the PCI IP core we developed had to be Xilinx LogiCORE PCI compatible pretty much cycle by cycle. Obscure features of Xilinx LogiCORE PCI needed to be implemented and tested against the original. We finally finished the project, and Verilog version of BDS XPCI PCI IP core is now available for as little as $100 for non-profit personal use. VHDL port is continuing, and should be done in a few weeks. I also agree with your comment that making sure that the PCI IP core works properly in all unusual corner cases is not easy, and requires a PCI testbench that is far more elaborate than what most FPGA vendors' provide with their PCI IP core. BDS XPCI PCI IP core purchaser gets the same PCI testbench we used for the verification of the PCI IP core, and is more elaborate than Xilinx's Ping reference design's testbench. Looking at the PCI Express specification (Ver. 1.0a), I think PCI Express has taken the difficulty of developing an I/O (or bus) interface to a new level. Not only is the specification longer, the protocol of PCI Express seems a lot more complicated than the Conventional PCI or even PCI-X. Another problem of PCI Express I think is the cost of the equipment. From what I understand, PCI Express requires a bleeding-edge oscilloscope which normally cost around $60,000, plus around $10,000 for four FET probes. Wow, at that cost, one can buy two $35,000 luxury cars for the cost of one small oscilloscope and several FET probes. In addition to that, a protocol analyzer is required to understand the protocol, and that is likely going to cost another nice $20,000 to $30,000. I will appreciate if someone can confirm the equipment cost of developing a PCI Express devices, but I suppose it can be lowered somewhat by leasing the equipment rather than outright buying them. I guess I don't like the idea of a lease, but perhaps that the only way to get the equipment in some cases. Perhaps, this $100,000 minimum (In practice much larger if other costs like personnel cost is counted.) is the reason why there are so few companies except for graphic card vendors sell PCI Express cards.

Kevin Brace

Tim Wescott wrote:

--
Brace Design Solutions
Xilinx (TM) LogiCORE (TM) PCI compatible BDS XPCI PCI IP core available 
for as little as $100 for non-commercial, non-profit, personal use.
http://www.bracedesignsolutions.com

Xilinx and LogiCORE are registered trademarks of Xilinx, Inc.

"Kevin Brace" schrieb im Newsbeitrag news:Mntrf.36310$ snipped-for-privacy@newssvr13.news.prodigy.com...

Hi Kevin,

its not that bad the $$$ money needed. For the endpoint core development sufficent is to just get an PCIe FPGA board and those cost as low as 800 USD.

using that one card and the supplied ipcore it is defenetly possible to develop own core.

what makes it un-reasonable is the amount of time investment needed what I would expect to be around one man year (when verfiied). So in case you have that one year of your life to 'invest' into the project it makes no sense to start.

"black" market PCIe cores with PHY are known to be offered for 50,000 USD

- what is way below of the costs of developing it, as the PHY is way more complex as the endpoint logic.

Anyway, if someone is really up to develop the PCIe endpoint core, I offer setting up the verification testbench for it, and maybe also do the FPGA testing for it. (I have done some preliminary work on the subject so I could re-use that experience)

Antti

Hi Antti,

I don't share your optimism regarding PCI Express. Yes, in theory, it is true that anyone can develop a PCI Express IP core using a sub $1,000 PCI Express FPGA development board. But in practice, one probably needs to have at least a PCI Express protocol analyzer to understand what is going on in PCI Express. And I don't think that is cheap. (I am guess it costs $20,000 to $30,000.) My fear (Maybe that's not an appropriate word.) from reading the PCI Express Base Specification Revision 1.0a is that the initialization sequence (link training) is far more complex than anything Conventional PCI had (RST# gets asserted 100ms after the computer is switched on.

64-bit PCI adds REQ64# assertion during RST# assertion to signal 64-bit environment.). So, because the protocol is far more complex, even someone like myself who has developed a Xilinx compatible PCI IP core does have hard time understanding the entire PCI Express protocol, especially the initialization sequence. (I guess that the part I am stuck right now.) Setting up the verification environment seems a lot more challenging than Conventional PCI due to the fact that the protocol is a lot more complex. I have looked into the PCI Express checklist, and it seems much longer and more detailed than Conventional PCI. I must say that knowing Conventional PCI doesn't gets to too far with PCI Express, perhaps, knowing how Ethernet works does.

Kevin Brace

Antti Lukats wrote:

--
Brace Design Solutions
Xilinx (TM) LogiCORE (TM) PCI compatible BDS XPCI PCI IP core available 
for as little as $100 for non-commercial, non-profit, personal use.
http://www.bracedesignsolutions.com

Xilinx and LogiCORE are registered trademarks of Xilinx, Inc.

"Kevin Brace" schrieb im Newsbeitrag news:Fkurf.37333$ snipped-for-privacy@newssvr29.news.prodigy.net...

where did you see my optimism? :)

I only stated that up-front 100,000 $ investment is not needed. and then that the project is un-reasonable as of the man-years required.

PCIe is WAY more complex as PCI. Way more.

it could still be done with one low cost PCIe board, and more work, meaning making your own protocol monitor-analyzer sw, etc, etc.

Antti

I think some clarification is in order. This is only necessary if you're developing a PCI-E PHY or physical layer interface. There is a specification called PIPE (physical interface for pci express) which defines a parallel clock, data recovered interface between a pci-e phy and the higher levels of the system. The equivalent to your PCI IP would be a block which sits above PIPE at which level you don't the scope and the probes if you assume that the PIPE block works.