Parallelsignal at 85 MHz

85Mhz parallel buses are not an issue for newer fpgas. Are you proposing to interface the fpga directly to the DVI serial pin or interface to a stand alone serdes? Lattice has a new low cost fpga with built in DSP blocks, the ECP. It is an ideal device to process signals. It does not have serdes built in though.

I designed a 16b datapath running @120MHz for a Xilinx Spartan-3 XC3S1000-FT256-4 (the slowest one) w/o any problem as long as you use a good VHDL synthesizer. The FPGA does not cost more than a few 10s$. So It's possible. Notice however that multipliers are scarce ressources for FPGA. Video processing w/ its trend to use // implementations (to sustain the sample rate) can require many of them if you don't take this constraints into account from the very beginning.

Eric